Untitled
Abstract: No abstract text available
Text: Preliminary GS8182S18/36D-333/300/250/200/167 18Mb Σ2x1B2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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Original
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GS8182S18/36D-333/300/250/200/167
165-Bump
165-bump,
144Mb
GS818x36D-300T.
8182Sxx
333MHz
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS8182S08/09/18/36BD-400/375/333/300/250/200/167 400 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
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08/09/18/36BD-400/375/333/300/250/200/167
165-Bump
144Mb
165-bump,
RoH167
GS818x36BD-300T.
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PDF
|
Untitled
Abstract: No abstract text available
Text: Preliminary GS8182S08/09/18BD-333/300/250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
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GS8182S08/09/18BD-333/300/250/200/167
165-Bump
144Mb
165-bump,
GS8182S08BGD-167I
GS818x36BD-300T.
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PDF
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Untitled
Abstract: No abstract text available
Text: Preliminary GS8182S18D-250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 250 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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Original
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GS8182S18D-250/200/167
165-Bump
165-bump,
144Mb
333MHz
8182Sxx
|
PDF
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GS8182S18BD-167
Abstract: GS8182S18BD-200 GS8182S18BD-250 GS8182S18BD-300
Text: Preliminary GS8182S08/09/18BD-333/300/250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
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GS8182S08/09/18BD-333/300/250/200/167
165-Bump
GS8182S08BGD-167I
GS818x36BD-300T.
GS8182S18BD-167
GS8182S18BD-200
GS8182S18BD-250
GS8182S18BD-300
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PDF
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GS8182S18
Abstract: GS8182S18D-167 GS8182S18D-200 GS8182S18D-250 GS8182S18D-250I GS8182S18D-267
Text: GS8182S18D-267/250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 267 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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Original
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GS8182S18D-267/250/200/167
165-Bump
165-bump,
8182Sxx
GS8182S18
GS8182S18D-167
GS8182S18D-200
GS8182S18D-250
GS8182S18D-250I
GS8182S18D-267
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PDF
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GS8182S18BD
Abstract: No abstract text available
Text: Preliminary GS8182S08/09/18BD-333/300/250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
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GS8182S08/09/18BD-333/300/250/200/167
165-Bump
144Mb
165-bump,
Ro82S08/09/18BD-333/300/250/200/167
GS8182S08GBD-167I
GS818x36BD-300T.
GS8182S18BD
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PDF
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Untitled
Abstract: No abstract text available
Text: Preliminary GS8182S18D-250/200/167 SigmaRAM Family Overview me nd ed for Ne w GS8182S18 are built in compliance with the SigmaSIO-II SRAM pinout standard for Separate I/O synchronous SRAMs. They are 18,874,368-bit 18Mb SRAMs. These are the first in a family of wide, very low voltage HSTL I/O SRAMs designed
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Original
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GS8182S18D-250/200/167
165-Bump
165-bump,
144Mb
8182Sxx
|
PDF
|
GS8182S08BD-167
Abstract: GS8182S08BD-200 GS8182S08BD-250 GS8182S08BD-300 GS8182S18BD
Text: GS8182S08/09/18/36BD-400/375/333/300/250/200/167 18Mb Burst of 2 SigmaSIO DDR-IITM SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
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08/09/18/36BD-400/375/333/300/250/200/167
165-Bump
with/167
GS8182S08BD-167
GS8182S08BD-200
GS8182S08BD-250
GS8182S08BD-300
GS8182S18BD
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PDF
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GS8182S36D-167
Abstract: GS8182S36D-200 GS8182S36D-250 GS8182S36D-300 GS8182S36D-333I
Text: Preliminary GS8182S18/36D-333/300/250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
|
Original
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GS8182S18/36D-333/300/250/200/167
165-Bump
165-bump,
8182Sxx
333MHz
GS8182S36D-167
GS8182S36D-200
GS8182S36D-250
GS8182S36D-300
GS8182S36D-333I
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PDF
|
Untitled
Abstract: No abstract text available
Text: Preliminary GS8182S18D-250/200/167 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 250 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
|
Original
|
GS8182S18D-250/200/167
165-Bump
165-bump,
144Mb
8182Sxx
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS8182S08/09/18/36BD-400/375/333/300/250/200/167 18Mb Burst of 2 SigmaSIO DDR-IITM SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
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08/09/18/36BD-400/375/333/300/250/200/167
165-Bump
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Preliminary GS8182S08/09/18/36BD-400/375/333/300/250/200/167 400 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 18Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
|
Original
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08/09/18/36BD-400/375/333/300/250/200/167
165-Bump
144Mb
165-bump,
GS818x36BD-300T.
|
PDF
|
GS8182S36D-200
Abstract: GS8182S36D-250 GS8182S36D-300
Text: Preliminary GS8182S18/36D-333/300/250/200/167 18Mb Σ2x1B2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
|
Original
|
GS8182S18/36D-333/300/250/200/167
165-Bump
165-bump,
8D-167I
165-Pin
GS818x36D-300T.
8182Sxx
333MHz
GS8182S36D-200
GS8182S36D-250
GS8182S36D-300
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PDF
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GS818
Abstract: DDR pinout GS8182S08BD-167 GS8182S08BD-200 GS8182S08BD-250 GS8182S08BD-300
Text: GS8182S08/09/18/36BD-400/375/333/300/250/200/167 18Mb Burst of 2 SigmaSIO DDR-IITM SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
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Original
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08/09/18/36BD-400/375/333/300/250/200/167
165-Bump
ith09/18/36BD-400/375/333/300/250/200/167
GS818
DDR pinout
GS8182S08BD-167
GS8182S08BD-200
GS8182S08BD-250
GS8182S08BD-300
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PDF
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