Untitled
Abstract: No abstract text available
Text: GS8342S08/09/18/36AE-250/200/167 250 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 SigmaSIO DDR-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Clocking and Addressing Schemes • Simultaneous Read and Write SigmaSIO™ Interface • JEDEC-standard pinout and package
|
Original
|
GS8342S08/09/18/36AE-250/200/167
165-Bump
165-bump,
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Preliminary GS8342S08/18/36E-400/300/250/200/167 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–400 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
|
Original
|
GS8342S08/18/36E-400/300/250/200/167
165-Bump
165-bump,
144Mb
Sigma0/200/167
GS8342S08E-167I
165-Pin
GS834x36E-300T.
8342Sxx
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Preliminary GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
|
Original
|
GS8342S08/09/18/36AE-333/300/250/200/167
165-Bump
8342SxxA
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS8342S08/09/18/36BD-400/350/333/300/250 36Mb SigmaSIO DDR-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features Clocking and Addressing Schemes • Simultaneous Read and Write SigmaSIO Interface
|
Original
|
GS8342S08/09/18/36BD-400/350/333/300/250
165-Bump
|
PDF
|
GS8342S36AE-167
Abstract: GS8342S36AE-200 GS8342S36AE-250 GS8342S36AE-300 GS8342S18AGE-250 GS8342S18AE-167
Text: GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
|
Original
|
GS8342S08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
8342SxxA
GS8342S36AE-167
GS8342S36AE-200
GS8342S36AE-250
GS8342S36AE-300
GS8342S18AGE-250
GS8342S18AE-167
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Preliminary GS8342S08/09/18/36BD-400/350/333/300/250 36Mb SigmaSIO DDR-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features Clocking and Addressing Schemes • Simultaneous Read and Write SigmaSIO Interface
|
Original
|
GS8342S08/09/18/36BD-400/350/333/300/250
165-Bump
165-bump,
Bu300T.
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Preliminary GS8342S08/09/18/36BD-400/350/333/300/250 36Mb SigmaSIO DDR-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
|
Original
|
GS8342S08/09/18/36BD-400/350/333/300/250
165-Bump
165-bump,
GS8342S36BD-300T.
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
|
Original
|
GS8342S08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
|
PDF
|
GS8342S36E-250
Abstract: GS8342S36E-300 GS8342S36E-333 flip chip
Text: Preliminary GS8342S08/09/18/36E-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
|
Original
|
GS8342S08/09/18/36E-333/300/250/200/167
165-Bump
165-bump,
8342Sxx
GS8342S36E-250
GS8342S36E-300
GS8342S36E-333
flip chip
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS8342S08/09/18/36BD-400/350/333/300/250 36Mb SigmaSIO DDR-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features Clocking and Addressing Schemes • Simultaneous Read and Write SigmaSIO Interface
|
Original
|
GS8342S08/09/18/36BD-400/350/333/300/250
165-Bump
165-bump,
|
PDF
|
AN1021
Abstract: No abstract text available
Text: Preliminary GS8342S08/09/18/36BD-400/350/333/300/250 36Mb SigmaSIO DDR-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features Clocking and Addressing Schemes • Simultaneous Read and Write SigmaSIO Interface
|
Original
|
GS8342S08/09/18/36BD-400/350/333/300/250
165-Bump
GS8342S36BD-300T.
AN1021
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 SigmaSIO DDR-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO™ Interface • JEDEC-standard pinout and package
|
Original
|
GS8342S08/09/18/36AE-333/300/250/200/167
165-Bump
8342SxxA
|
PDF
|
GS8342S18AE-250
Abstract: GS8342S36AE-167 GS8342S36AE-200 GS8342S36AE-250 GS8342S36AE-300
Text: Preliminary GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
|
Original
|
GS8342S08/09/18/36AE-333/300/250/200/167
165-Bump
118/36AE-333/300/250/200/167
8342SxxA
GS8342S18AE-250
GS8342S36AE-167
GS8342S36AE-200
GS8342S36AE-250
GS8342S36AE-300
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Preliminary GS8342S08/09/18/36BD-400/350/333/300/250 36Mb SigmaSIO DDR-IITM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 400 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package
|
Original
|
GS8342S08/09/18/36BD-400/350/333/300/250
165-Bump
165-bump,
GS8342S36BD-300T.
|
PDF
|
|
|
GS8342S36AE-167
Abstract: GS8342S36AE-200 GS8342S36AE-250 GS8342S36AE-300
Text: GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 SigmaSIO DDR-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO™ Interface • JEDEC-standard pinout and package
|
Original
|
GS8342S08/09/18/36AE-333/300/250/200/167
165-Bump
165-bump,
15ble
8342SxxA
GS8342S36AE-167
GS8342S36AE-200
GS8342S36AE-250
GS8342S36AE-300
|
PDF
|