Untitled
Abstract: No abstract text available
Text: SN54LV32, SN74LV32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS188C – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV32,
SN74LV32
SCLS188C
MIL-STD-883C,
JESD-17
300-mil
SN54LV32
SN74LV32
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV32, SN74LV32 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS188C − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV32,
SN74LV32
SCLS188C
MIL-STD-883C,
JESD-17
300-mil
SN54LV32
SN74LV32
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV32, SN74LV32 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS188C − FEBRUARY 1993 − REVISED APRIL 1996 SN54LV32 . . . J OR W PACKAGE SN74LV32 . . . D, DB, OR PW PACKAGE TOP VIEW D EPIC (Enhanced-Performance Implanted D D D D 1A 1B 1Y 2A 2B 2Y GND
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Original
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SN54LV32,
SN74LV32
SCLS188C
SN54LV32
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PDF
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SN74LV32
Abstract: SN74LV32D SN74LV32DBLE SN74LV32DR SN74LV32PWLE LV32 SN54LV32
Text: SN54LV32, SN74LV32 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS188C − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV32,
SN74LV32
SCLS188C
MIL-STD-883C,
JESD-17
300-mil
SN74LV32
SN74LV32D
SN74LV32DBLE
SN74LV32DR
SN74LV32PWLE
LV32
SN54LV32
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PDF
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LV32
Abstract: SN54LV32 SN74LV32
Text: SN54LV32, SN74LV32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS188C – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV32,
SN74LV32
SCLS188C
MIL-STD-883C,
JESD-17
300-mil
SN54LV32
LV32
SN54LV32
SN74LV32
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV32, SN74LV32 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS188C − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV32,
SN74LV32
SCLS188C
MIL-STD-883C,
JESD-17
300-mil
SN54LV32
SN74LV32
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV32, SN74LV32 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS188C − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV32,
SN74LV32
SCLS188C
MIL-STD-883C,
JESD-17
300-mil
SN54LV32
SN74LV32
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PDF
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LV32
Abstract: SN54LV32 SN74LV32
Text: SN54LV32, SN74LV32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS188C – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV32,
SN74LV32
SCLS188C
MIL-STD-883C,
JESD-17
300-mil
SN54LV32
LV32
SN54LV32
SN74LV32
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV32, SN74LV32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS188C – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV32,
SN74LV32
SCLS188C
MIL-STD-883C,
JESD-17
300-mil
SN54LV32
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PDF
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SN54LV32
Abstract: LV32 SN74LV32
Text: SN54LV32, SN74LV32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS188C – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV32,
SN74LV32
SCLS188C
MIL-STD-883C,
JESD-17
300-mil
SN54LV32
SN54LV32
LV32
SN74LV32
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PDF
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SN74HC02 Spice model
Abstract: philips semiconductor data handbook SDAD001C SDFD001B SCAD001D SN7497 spice model SN74AHC14 spice Transistor Crossreference SLLS210 ci ttl sn74ls00
Text: LOGIC OVERVIEW 1 FUNCTIONAL INDEX 2 FUNCTIONAL CROSSĆREFERENCE 3 DEVICE SELECTION GUIDE 4 3 LOGIC SELECTION GUIDE FIRST QUARTER 1997 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest
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Original
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PDF
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LV08
Abstract: No abstract text available
Text: SN54LV08, SN74LV08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS1B6C - FEBRUARY 1993 - REVISED APRIL 1996 EPIC Enhanced-Performance Implanted CMOS 2-pi Process SN54LV08 . . . J OR W PACKAGE SN74LV08 . . . D, DB, OR PW PACKAGE (TOP VIEW) Typical V q lp (Output Ground Bounce)
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OCR Scan
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SN54LV08,
SN74LV08
MIL-STD-883C,
JESD-17
300-mil
LV08
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PDF
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