STP2013 Search Results

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Catalog Datasheet	MFG & Type	Document Tags	PDF
STP2013 Abstract: Mbus master 250 slave circuit STP2013PGA-50 m-bus mbus STP2011 STP2013PGA50 MAD44 Text: STP2013PGA-50 July 1997 EMC DATA SHEET Error-Correcting Memory Controller DESCRIPTION The STP2013 Error-Correcting Memory Controller control mechanism consists of a central arbiter that selects between MBus and graphics-request masters, while monitoring periodic refresh and VIO preemptive interrupts. Satellite state machines are granted execution by the arbiter in response to a buffered request. Stalled	Original	STP2013PGA-50 STP2013 STP2013PGA 299-Pin STP2013 Mbus master 250 slave circuit STP2013PGA-50 m-bus mbus STP2011 STP2013PGA50 MAD44	PDF
STP2016 Abstract: SuperSPARC mbus 10 application STP2011 STP2016QFP mbus MCLK11 MOSC STP2012 Text: STP2016 July 1997 Clock-2 Generator System Clock Generator DATA SHEET DESCRIPTION The STP2016 Clock-2 Chip generates clock signals for components on the SBus and MBus. The MBus and SBus are used by SPARC processors, such as SuperSPARC™. The MBus is designed for multiprocessing MP , operating at	Original	STP2016 STP2016 64-bit PQFP100 100-Pin STP2016QFP SuperSPARC mbus 10 application STP2011 STP2016QFP mbus MCLK11 MOSC STP2012	PDF
53C90A Abstract: ncr53c90 STP2012 53C90 AD12 AM7990 STP2013 EIRQ15 STP2011 53c90 scsi Text: STP2012QFP July 1997 DMA2 DATA SHEET SBus DMA Controller DESCRIPTION The STP2012 SBus DMA Controller DMA2 provides three channels for DMA transfers over the SBus. It has three external interfaces designed to provide DMA access to one AMD Am7990 Local Area Network Controller for the Ethernet (LANCE), one NCR 53C90 SCSI controller (ESP), and one programmable Centronics-type parallel port. The	Original	STP2012QFP STP2012 Am7990 53C90 STP2012PQFP 160-Pin STP2012 53C90A ncr53c90 AD12 STP2013 EIRQ15 STP2011 53c90 scsi	PDF
STP30 Abstract: PQFP100 STP3020 STP2016 VRAM Text: STP3022 July 1997 VBC Video Buffer-50 MHz DATA SHEET DESCRIPTION The STP3022 Video Buffer VBC allows a single system to have multiple Video SIMMs with independent video timing. It acts as a buffer for the multiplexed address lines, the byte write enables, and the row and column address strobes which	Original	STP3022 Buffer-50 STP3022 STP3020 PQFP100 STP30 STP2016 VRAM	PDF
TAZ BI-DIR Abstract: Mbus master 250 slave circuit STP2103 MAD32 Text: S un M ic r o e le c t r o n ic s July 1997 EMC DATA SHEET Error-Correcting Memory Controller D e s c r ip t io n The STP2013 Error-Correcting Memory Controller control mechanism consists of a central arbiter that selects between MBus and graphics-request masters, while monitoring periodic refresh and VIO preemptive inter	OCR Scan	STP2013 STP2013 TAZ BI-DIR Mbus master 250 slave circuit STP2103 MAD32	PDF
Untitled Abstract: No abstract text available Text: S T P 2 Û1 3 P G A -50 S un M ic r o e le c t r o n ic s July 1997 EMC DATA SHEET Error-Correcting M emory Controller D e s c r ip t io n The STP2013 Error-C orrecting M em ory C ontroller control m echanism consists of a central arbiter that selects betw een M Bus and graphics-request m asters, w hile m onitoring periodic refresh and VIO preem ptive inter	OCR Scan	STP2013 STP201 299-Pin STP2013	PDF
D37M Abstract: No abstract text available Text: STP2013PGA-50 S un M ic r o e l e c t r o n ic s J u ly 1997 EMC DATA SHEET Error-Correcting Memory Controller D e s c r ip t io n The STP2013 Error-Correcting M em ory Controller control m echanism consists of a central arbiter that selects betw een M Bus and graphics-request masters, while m onitoring periodic refresh and VIO preem ptive inter	OCR Scan	STP2013PGA-50 STP2013 DR0000000000000000000 SSSSSSS00000000000® TP2013PG 299-Pin D37M	PDF
lcd cross reference Abstract: SME2411BGA SuperSPARC 805-0086-02 PMC cross reference STP2003QFP ATM622-S STP3010 STP2014QFP STP2024QFP Text: S un M icroelectronics July 1997 Data Sheets listed by Product Name Cross Reference List Advanced PCI Bridge SME2411BGA ATM622-S SAR SME4050BGA 802-7894-02 Color LCD Controller STP3031 STP3031 Crossbar Switch XB1 STP2230SOP 802-7955-02 Dual System Controller	OCR Scan	ATM622-S 85/110MHz UltraSPARC-1167 UltraSPARC-11 UltraSPARC-ll/300 Buffer-50 STP1030A STP5111A-200 STP5110A-167 lcd cross reference SME2411BGA SuperSPARC 805-0086-02 PMC cross reference STP2003QFP STP3010 STP2014QFP STP2024QFP	PDF
STP201 Abstract: No abstract text available Text: STP3022 S un M ic r o e l e c t r o n ic s J u ly 1997 VBC Video Buffer-50 MHz DATA SHEET D e s c r ip t io n The STP3022 Video Buffer VBC allows a single system to have m ultiple Video SIM M s w ith independent video timing. It acts as a buffer for the multiplexed address lines, the byte write enables, and the row and col	OCR Scan	STP3022 STP3022 STP3020 STP3D22 Buffer-50 100-Pin STP201	PDF
supersparc Abstract: STP2003QFP STP3010PGA 805-0086-02 lcd cross reference STP2013 PMC cross reference STP3010 ATM622-S STP2024QFP Text: S un M icroelectronics July 1997 Data Sheets listed by Marketing Part Cross Reference List M a r k e t in g P a r t 501-4126 Fast Frame Buffer 3D 802-7509-02 501-4127 Fast Frame Buffer (2D) 802-7509-02 SME1040BGA UltraSPARC-ll/ 300 MHz 805-0086-02 SME2411BGFA	OCR Scan	SME1040BGA SME2411BGFA SME4050BGA STP1012PGA-85, STP1021APGA STP1030A STP1031 LGA-250 STP1080A STP1081 supersparc STP2003QFP STP3010PGA 805-0086-02 lcd cross reference STP2013 PMC cross reference STP3010 ATM622-S STP2024QFP	PDF
Untitled Abstract: No abstract text available Text: STP3022 S un M ic r o e l e c t r o n ic s J u ly 1997 VBC Video Buffer-50 MHz DATA SHEET D e s c r ip t io n The STP3022 Video Buffer VBC allows a single system to have m ultiple Video SIM M s w ith independent video timing. It acts as a buffer for the m ultiplexed address lines, the byte write enables, and the row and col	OCR Scan	STP3022 Buffer-50 STP3022 STP3020 100-Pin	PDF
STP2003QFP Abstract: ATM622-S STP2012 ATM 814 Text: ASICs STP2003QFP: PCIO Peripheral Component Interconnect I/O D	OCR Scan	STP2003QFP: STP2003QFP ATM622-S STP2012 ATM 814	PDF
Untitled Abstract: No abstract text available Text: S un M ic r o e l e c t r o n ic s July 1997 VBC Video Buffer-50 MHz DATA SHEET D e s c r ip t io n The STP3022 Video Buffer VBC allows a single system to have multiple Video SIMMs with independent video timing. It acts as a buffer for the multiplexed address lines, the byte write enables, and the row and col	OCR Scan	STP3022 STP3020 STP3022QFP Buffer-50 100-Pin	PDF