A7X K Search Results

Contextual Info: KA711/I DUAL COMPARATOR DUAL HIGH-SPEED DIFFERENTIAL COMPARATOR T h e KA711/1 contain tw o voltage com parators w ith the separate differential inputs, a com m on output and provi­ sion fo r strobing each side independently. T h e device features high accuracy, fa st response, low offset voltage,

R1610N

Abstract: r161 R1610 R1612 30 position rotary potentiometers 5k R1610k
Contextual Info: Rotary Potentiometers R14 Size Mechanical characteristics: Total rotational angle 300 Rotational torque 2 ~ 20mN.m 20~200gf.cm without bushing 0.5N.m(5kgf.cm) with bushing 0.6N.m(6kgf.cm) Rotary Potentiometers 5 Rotation stopper strength Push pull strength

a7x transistor

Abstract: diode t25 4 F0
Contextual Info: 6N135 6N136 Infineon :hno I High-Speed TRIOS Optocoupler FEA TU R ES Isolation Test Voltage: 530 0 V RMS T T L C om patible H igh Bit R ates: 1.0 M bit/s H igh C om m o n -M o d e In terfe re n c e Im m unity B an dw idth 2 .0 M H z O p en -C o lle c to r O u tput

Contextual Info: Contents Pin Pin Functions. 1 Block Diagram. 2

sis 6326

Contextual Info: SFH6325 SFH6326 Infineon High-Speed Dual Optocoupler Dim ensions in in ches mm FEATURES • Isolation Test Voltage: 5300 V RMS • TTL Compatible • Bit Rates: 1.0 MBit/s • High Common-mode Transient Immunity • Bandwidth 2.0 MHz • Open-Collector Output

a7x transistor

Abstract: aen6 MSP430 A7X ad AEN.5 ACTL12 MDB Resistor
Contextual Info: MSP430 Family 15 Analog-To-Digital Converter Analog-To-Digital Converter Topic Page 15.1 Overview 15-3 15.2 Analog-to-Digital Operation 15-5 15.3 ADC Control Registers 15-15 15 15-1 Analog-To-Digital Converter 15 15-2 MSP430 Family MSP430 Family Analog-To-Digital Converter

Contextual Info: 2939G CMOS 4K-Bit Serial EEPROM Easy Interface with Serial Port with Memory Protection, CS Active “L” Technology, Incorporated August 1992 • Wide Operating Voltage Range - Write: 2.7 to 6.5 V - Read: 1.8 to 6.5 V ■ Write Operation with Built-In Timer

Contextual Info: KM736V790 128Kx36 Synchronous SRAM Document Tills 128Kx36-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 Initial draft December. 15. 1997 Prelim inary 0.1 Change speed symbol 6.0/6.7/7.5/8.5 to 60/67/75/85, Change 7.5 bin to 7.2

Contextual Info: KM29V16000ATS_ FLASH MEMORY Document Tills 2M x 8 Bit NAND Flash Memory Revision History Revision No. History Draft Date 0.0 Data Sheet, 1997. April 10th 1997 1.0 Data Sheet, 1998. 1. Changed tBERS p a ra m e te r: 5ms Typ. —» 2ms(Typ.).

Contextual Info: Contents Features. 1 Pin Assignm ent. 1 Pin

a7y transistor

Abstract: RASH soj20 Package UD61256 tsu a7y
Contextual Info: UD61256 Maintenance only 256K x 1 DRAM Features Description F Dynamic random access memory F F F F F F F F F F 262144 x 1 bit manufactured using a CMOS technology RAS access times 70 ns, 80 ns TTL-compatible Three-state output 256 refresh cycles 4 ms refresh cycle time

transistor a7y

Abstract: a7y transistor tsu a7y a7x transistor RASH soj20 Package ud61256 NS10000 tca 680 UD61256DC
Contextual Info: Maintenance only UD61256 256K x 1 DRAM Features Description F Dynamic random access memory F F F F F F F F F F 262144 x 1 bit manufactured using a CMOS technology RAS access times 70 ns, 80 ns TTL-compatible Three-state output 256 refresh cycles 4 ms refresh cycle time

Contextual Info: Contents Features. 1 Pin A ssignm ent. 1 Pin F unctions. 1 Block Diagram. 2

D0243

Contextual Info: FLASH MEMORY KM29V32000TS/RS 4M x 8 Bit NAND Flash Memory FEATURES GENERAL DESCRIPTION • Single 3.3 - volt Supply • Organization - Memory Celi Array : 4M +128K bit x 8bit - Data Register : (512 + 16)bit x 8bit • Automatic Program and Erase - Page Program : (512 + 16)Byte

RASH

Abstract: transistor a7y UD61466
Contextual Info: Maintenance only UD61466 64K x 4 DRAM Features F Dynamic random access memory F F F F F F F F F F F 65536 x 4 bits manufactured using a CMOS technology RAS access times 70 ns/80 ns TTL-compatible Three-state outputs bidirectional 256 refresh cycles 4 ms refresh cycle time

104 k5k capacitor

Abstract: k5k 104 capacitor 104 capacitor k5k ibm thinkpad t42 bmdc ibm thinkpad t40 ibm t42 M1E wireless ibm t40 lcd 1802 dfx
Contextual Info: IBM Mobile Systems ThinkPad Computer Hardware Maintenance Manual August 2004 This manual supports: ThinkPad T40/T40p, T41/T41p, T42/T42p MT 2373/2374/2375/2376/2378/2379 ThinkPad Dock II (MT 2877) Note Before using this information and the product it supports, be sure to read the general information

UD61464DC

Abstract: 65536X4 RASH UD61464 RW100-50 A7X k
Contextual Info: Maintenance only UD61464 64K x 4 DRAM Features FPM facilitates faster data operation with predefined row address. Via 8 Dynamic random access memory address inputs the 16 address bits are transmitted into the internal 65536 x 4 bits manufactured address memories in a time-multiusing a CMOS technology

a7y transistor

Abstract: a7x transistor transistor a7y UD61464 tv pattern generator RASH UD61464DC pd 223
Contextual Info: Maintenance only UD61464 64K x 4 DRAM Features FPM facilitates faster data operation with predefined row address. Via 8 Dynamic random access memory address inputs the 16 address bits are transmitted into the internal 65536 x 4 bits manufactured address memories in a time-multiusing a CMOS technology

ad2y

Abstract: AD7Y A10y hm3 65231 mhs p-8088
Contextual Info: IH M A f l H S DATA SHEET SEPTEMBER 1988 HM 65231 2K x 8 C M O S DUAL PORT RAM FEATURES . HIGH SPEED, FAST ACCESS TIME : COMMERCIAL : 80 ns max INDUSTRIAL : 100 ns max MILITARY: 120 ns max . STANDBY CURRENT: 3 mA . OPERATING SUPPLY CURRENT: 60 mA max . BATTERY BACK UP OPERATION :

35C102

Contextual Info: Contents Features. 1 Pin Assignment.

a7y transistor

Abstract: RASH UD61466 A7X k
Contextual Info: Maintenance only UD61466 64K x 4 DRAM Features F Dynamic random access memory F F F F F F F F F F F 65536 x 4 bits manufactured using a CMOS technology RAS access times 70 ns/80 ns TTL-compatible Three-state outputs bidirectional 256 refresh cycles 4 ms refresh cycle time

S93C66D

Abstract: S93C46d S93C56D S93C56 93c 66m S-93C56ADFJ
Contextual Info: Contents Features. 1 Pin A ssignm Pin F un ctions. 1 Block Diagram . 2

Contextual Info: Contents F e a tu re s . 1 Pin A ssignm en t.

A970 GR

Abstract: A950 transistor a970 transistor a950 A970 A970 GR 41 a970 transistor a7x transistor a950 o transistor a950 transistor datasheet
Contextual Info: CXD3048R CD Digital Signal Processor with Built-in Digital Servo + Shock-proof Memory Controller + Digital High & Bass Boost Description The CXD3048R is a digital signal processor LSI for CD players. This LSI incorporates a digital servo, high & bass boost, shock-proof memory controller, 1-bit DAC and