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    AMPHION Search Results

    AMPHION Datasheets (30)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    1024-Channel-ADPCM Amphion Semiconductor 1024-Channel ADPCM Original PDF
    256-Channel-ADPCM Amphion Semiconductor 256-Channel ADPCM Original PDF
    512-Channel-ADPCM Amphion Semiconductor 512-Channel ADPCM Original PDF
    CS3210 Amphion Semiconductor Reed-Solomon Decoder Original PDF
    CS3212 Amphion Semiconductor Reed-Solomon Decoder Original PDF
    CS3310 Amphion Semiconductor Programmable Convolution Encoder Original PDF
    CS3410 Amphion Semiconductor High Speed Viterbi/TCM Decoder Original PDF
    CS3810 Amphion Semiconductor 32 Qam Demodulator Original PDF
    CS3810 Amphion Semiconductor 32 Qam Demodulator Original PDF
    CS4110 Amphion Semiconductor ADPCM Speech Coder Original PDF
    CS4120 Amphion Semiconductor ADPCM Speech Coder Original PDF
    CS4130 Amphion Semiconductor ADPCM Speech Coder Original PDF
    CS4180 Amphion Semiconductor ADPCM Speech Coder Original PDF
    CS4190 Amphion Semiconductor ADPCM Speech Coder Original PDF
    CS4191 Amphion Semiconductor ADPCM Speech Coder Original PDF
    CS5010 Amphion Semiconductor DES/3DES Encryption/Decryption Cores Original PDF
    CS5010RR Amphion Semiconductor DES/3DES Encryption/Decryption Cores Original PDF
    CS5020RR Amphion Semiconductor DES/3DES Encryption/Decryption Cores Original PDF
    CS5030RR Amphion Semiconductor DES/3DES Encryption/Decryption Cores Original PDF
    CS6100 Amphion Semiconductor Motion JPEG Encoder Original PDF

    AMPHION Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    decoder huffman

    Abstract: Motion JPEG Codec vhdl code for huffman decoding VHDL code DCT dct verilog code mjpeg encoder CS6190 vhdl code for transpose memory huffman encoding and decoding using VHDL "Huffman coding"
    Text: Motion JPEG Codec Core V1.0 March 4, 2002 Product Specification AllianceCORE Facts TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001 E-mail: info@amphion.com URL: www.amphion.com Features


    Original     		PDF

    CS5200

    Abstract: CS5250-80 556 pinout diagram data encryption standard vhdl CS-527 wireless ciphertext
    Text: High-Performance Decryption Cores January 28, 2002 Product Specification AllianceCORE Facts Core Specifics See Table 1 Provided with Core TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001


    Original     		128-bit 256-bit 32-bit CS5200 CS5250-80 556 pinout diagram data encryption standard vhdl CS-527 wireless ciphertext PDF

    chn 723

    Abstract: g.711 simulation quantizer verilog code
    Text: 1024-Channel ADPCM February 26, 2001 Product Specification AllianceCORE Facts TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001 E-Mail: info@amphion.com URL: www.amphion.com Features


    Original     		1024-Channel simplex/512 chn 723 g.711 simulation quantizer verilog code PDF

    CS5230

    Abstract: cs6100 CS5220 CS-524 cs5240 CS5210-40 XCV100E power AES 256 encryption 32 bit CS5200 CS52-10
    Text: High-Performance Encryption Cores January 28, 2002 Product Specification AllianceCORE Facts Core Specifics See Table 1 Provided with Core TM Amphion Semiconductor, Ltd. 50 Malone Road Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001


    Original     		128-bit 256-bit 32-bit CS5230 cs6100 CS5220 CS-524 cs5240 CS5210-40 XCV100E power AES 256 encryption 32 bit CS5200 CS52-10 PDF

    huffman code generator in verilog

    Abstract: verilog code for huffman coding huffman decoder verilog jpeg encoder vhdl code verilog code for huffman encoding jpeg encoder jpeg encoder RTL IP core encoder verilog coding "Huffman coding"
    Text: Motion JPEG Encoder Core V2.0 March 4, 2002 Product Specification AllianceCORE Facts TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001 E-mail: info@amphion.com URL: www.amphion.com


    Original     		PDF

    vhdl code for huffman decoding

    Abstract: CS6150 mjpeg decoder jpeg decoder RTL IP core CS6190 VHDL code DCT jpeg encoder vhdl code Variable Length Decoder VLD huffman decoder verilog
    Text: Motion JPEG Decoder Core V1.0 March 4, 2002 Product Specification AllianceCORE Facts TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001 E-mail: info@amphion.com URL: www.amphion.com


    Original     		PDF

    4 to 2 compressor 16 bit vhdl

    Abstract: g.711 simulation 95214 512-Channel-ADPCM g723 ADPCM algorithm ADPCM CHN 711 verilog code for 4-2 compressor quantizer verilog code
    Text: 512-Channel ADPCM February 26, 2001 Product Specification AllianceCORE Facts TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001 E-Mail: info@amphion.com URL: www.amphion.com Features


    Original     		512-Channel simplex/256 4 to 2 compressor 16 bit vhdl g.711 simulation 95214 512-Channel-ADPCM g723 ADPCM algorithm ADPCM CHN 711 verilog code for 4-2 compressor quantizer verilog code PDF

    chn 723

    Abstract: chn 711 256-Channel-ADPCM CHN 727 chn 726
    Text: 256-Channel ADPCM February 26, 2001 Product Specification AllianceCORE Facts TM Amphion Semiconductor, Ltd. 50 Malone Rd Belfast BT9 5BS Northern Ireland Phone: +44 28 9050 4000 Fax: +44 28 9050 4001 E-Mail: info@amphion.com URL: www.amphion.com Features


    Original     		256-Channel simplex/128 chn 723 chn 711 256-Channel-ADPCM CHN 727 chn 726 PDF

    80C31 instruction set

    Abstract: XC2S200 pq208 xilinx fifo generator 6.2 application of 8259 microcontroller design BCD adder pal dvb-RCS modem hitachi pbx AX1610 MC68000 opcodes adder xilinx
    Text: Vendor Name IP Type Xilinx Xilinx Xilinx sysonchip Xilinx Xilinx Amphion Amphion Amphion Amphion Amphion Xilinx Xilinx NewLogic LogiCORE LogiCORE LogiCORE AllianceCORE LogiCORE LogiCORE AllianceCORE AllianceCORE AllianceCORE AllianceCORE AllianceCORE LogiCORE


    Original     		8b/10b DO-DI-ADPCM32) DO-DI-ADPCM64) CC-201) CC-200) CRC10 CC-130) CRC32 CC-131) 80C31 instruction set XC2S200 pq208 xilinx fifo generator 6.2 application of 8259 microcontroller design BCD adder pal dvb-RCS modem hitachi pbx AX1610 MC68000 opcodes adder xilinx PDF

    Amphion

    Abstract: vhdl code for 4 channel dma controller dct verilog code CS6650 ESVA vhdl code for transpose memory
    Text: CS6650 TM High Definition MPEG-2 Video Decoder Virtual Components for the Converging World The CS6650 high-definition MPEG2 decoder is designed to provide high performance solutions for a broad range of motion image applications. This highly integrated application specific core is developed for standard


    Original     		CS6650 CS6650 DS6650-c Amphion vhdl code for 4 channel dma controller dct verilog code ESVA vhdl code for transpose memory PDF

    CS6100

    Abstract: Huffman 1000X CS6150 Variable Length Decoder VLD
    Text: CS6150 Motion JPEG Decoder Virtual Components for the Converging World The CS6150 Motion JPEG M-JPEG Decoder is a highly integrated virtual component solution for leadingedge image decompression applications. Its high performance is capable of sustaining data rates of over 125


    Original     		CS6150 CS6150 CS6100 DS6150-b Huffman 1000X Variable Length Decoder VLD PDF

    cs3411

    Abstract: viterbi decoder soft bit viterbi
    Text: CS3411QL Viterbi Decoder k=7, r=1/2 Data Sheet Executive Summary Module BSC256FFT Device QuickDSP QL7180 -7 Worst Case Speed Grade 3714/3966 (91.2%/98.4%) Area (no buffers/ buffered) 18 of 36 (50%) RAM Cells used 36 MHz Maximal Clock Frequency Device Highlights


    Original     		CS3411QL BSC256FFT QL7180 CS3411 viterbi decoder soft bit viterbi PDF

    CS31

    Abstract: CIRCUIT DIAGRAM 7404 functional DIAGRAM 7404 IESS-308 code 02HEX CS3110 CS3112 K3025 Artisan Components
    Text: CS3110/12 Reed-Solomon Encoders Virtual Components for the Converging World The CS3110 and CS3112 Reed-Solomon encoders are designed to provide high performance solutions for a broad range of applications requiring forward error correction. These application specific


    Original     		CS3110/12 CS3110 CS3112 CS3110) CS3112) DS3110-b CS31 CIRCUIT DIAGRAM 7404 functional DIAGRAM 7404 IESS-308 code 02HEX K3025 Artisan Components PDF

    CS3210

    Abstract: 02HEX CS3212 CSO3210
    Text: CS3210/12 Reed-Solomon Decoders Virtual Components for the Converging World The CS3210 and CS3212 Reed-Solomon decoders are designed to provide high performance solutions for a broad range of applications requiring forward error correction. These application specific virtual components


    Original     		CS3210/12 CS3210 CS3212 CS3210) CS3212) 880Mbits DS3210-b 02HEX CSO3210 PDF

    Convolutional Encoder

    Abstract: CS3530 Convolutional Block Interleaver time interleaver "Single-Port RAM" turbo encoder circuit
    Text: CS3530 TM Turbo Encoder Virtual Components for the Converging World The CS3530 Turbo Encoder is designed to provide efficient and high performance solutions for a broad range of applications requiring reliable communications in bandwidth scarce environments such as satellite and mobile


    Original     		CS3530 CS3530 CDMA2000 DS3530 Convolutional Encoder Convolutional Block Interleaver time interleaver "Single-Port RAM" turbo encoder circuit PDF

    viterbi IESS-308/309

    Abstract: xilinx logicore core dds Automatic Railway Gate Control system, CORDIC system generator xilinx xilinx logicore core dds square wave XAPP474 CORDIC to generate sine wave fpga spartan3 fpga development boards dvb-s encoder design with fpga Sequential IESS-308/309
    Text: Application Note: Spartan-3 FPGA Series R Using IP Cores in Spartan-3 Generation FPGAs XAPP474 v1.1 June 19, 2005 Summary This document provides an overview of the Xilinx CORE Generator System and the Xilinx Intellectual Property (IP) offerings that facilitate the Spartan™-3 Generation design process.


    Original     		XAPP474 27MHz viterbi IESS-308/309 xilinx logicore core dds Automatic Railway Gate Control system, CORDIC system generator xilinx xilinx logicore core dds square wave XAPP474 CORDIC to generate sine wave fpga spartan3 fpga development boards dvb-s encoder design with fpga Sequential IESS-308/309 PDF

    CS3212

    Abstract: forney CS3210
    Text: CS3210/12 TM Reed-Solomon Decoders Virtual Components for the Converging World The CS3210 and CS3212 Reed-Solomon decoders are designed to provide high performance solutions for a broad range of applications requiring forward error correction. These application specific virtual components ASVCs


    Original     		CS3210/12 CS3210 CS3212 CS3210) CS3212) 880Mbits CS3212 DS3210 forney PDF

    16 QAM modulation matlab code

    Abstract: lx5280 CZ80PIO PLD-10 uart 8250 CRC matlab lEXRA lx5280 qpsk simulink matlab OFDM DSP Builder Alcatel dsp
    Text: インテレクチャル・プロパティ・ セレクタ・ガイド System-on-a-Programmable-Chipソリューションの ためのIPファンクション アルテラのIPファンクションについて 数百万ゲートのプログラマブル・ロジック・デバイス（PLD）の登


    Original     		AMPP15 16 QAM modulation matlab code lx5280 CZ80PIO PLD-10 uart 8250 CRC matlab lEXRA lx5280 qpsk simulink matlab OFDM DSP Builder Alcatel dsp PDF

    datasheet transistor said horizontal tt 2222

    Abstract: interface of rs232 to UART in VHDL xc9500 80C31 instruction set apple ipad schematic drawing 8 bit alu in vhdl mini project report apple ipad 2 circuit schematic apple ipad Apple iPad 2 panasonic inverter dv 700 manual TT 2222 Horizontal Output Transistor pins out
    Text: Virtex-II Platform FPGA User Guide UG002 v2.2 5 November 2007 R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the


    Original     		UG002 datasheet transistor said horizontal tt 2222 interface of rs232 to UART in VHDL xc9500 80C31 instruction set apple ipad schematic drawing 8 bit alu in vhdl mini project report apple ipad 2 circuit schematic apple ipad Apple iPad 2 panasonic inverter dv 700 manual TT 2222 Horizontal Output Transistor pins out PDF

    xilinx vhdl code for floating point square root

    Abstract: multiplier accumulator MAC code verilog multi channel UART controller using VHDL 80C31 instruction set vhdl code of 32bit floating point adder verilog code for floating point adder xilinx logicore fifo generator 6.2 xilinx vhdl code for floating point square root o vhdl code for 3-8 decoder using multiplexer vhdl code 32bit LFSR
    Text: R Using the CORE Generator System Introduction This section on the Xilinx CORE Generator System and the Xilinx Intellectual Property IP Core offerings is provided as an overview of products that facilitate the Virtex-II design process. For more detailed and complete information, consult the CORE Generator


    Original     		XC2V1000-4 UG002 xilinx vhdl code for floating point square root multiplier accumulator MAC code verilog multi channel UART controller using VHDL 80C31 instruction set vhdl code of 32bit floating point adder verilog code for floating point adder xilinx logicore fifo generator 6.2 xilinx vhdl code for floating point square root o vhdl code for 3-8 decoder using multiplexer vhdl code 32bit LFSR PDF

    4x4 unsigned multiplier VERILOG coding

    Abstract: vhdl code for lvds driver 32x32 multiplier verilog code MULT18X18 12v relay interface with cpld in vhdl verilog/verilog code for lvds driver 80C31 instruction set vhdl code for 18x18 unSIGNED MULTIPLIER vhdl pulse interval encoder book national semiconductor
    Text: R Chapter 2 Design Considerations Summary This chapter covers the following topics: • • • • • • • • • • • • • • • • • Rocket I/O Transceiver Processor Block Global Clock Networks Digital Clock Managers DCMs Block SelectRAM Memory


    Original     		UG012 4x4 unsigned multiplier VERILOG coding vhdl code for lvds driver 32x32 multiplier verilog code MULT18X18 12v relay interface with cpld in vhdl verilog/verilog code for lvds driver 80C31 instruction set vhdl code for 18x18 unSIGNED MULTIPLIER vhdl pulse interval encoder book national semiconductor PDF

    system generator REED SOLOMON

    Abstract: 02HEX CS3214
    Text: CS3214 High Speed G.709/G,975 Compliant ReedSolomon Decoder - Preliminary Datasheet TM Virtual Components for the Converging World The CS3214 Reed-Solomon Decoder is designed to provide high performance solutions for forward error correction requirements and meets the ITU G.709 standard for Optical Transport Networks OTN providing


    Original     		CS3214 709/G CS3214 DS3214 system generator REED SOLOMON 02HEX PDF

    8 bit Array multiplier code in VERILOG

    Abstract: vhdl code for radix-4 fft ecu input and output vhdl code of 32bit floating point adder IESS-309 vhdl code of floating point adder ecu BLOCK DIAGRAM vhdl code for ieee 754 32-bit floating point adder ieee floating point multiplier verilog low pass fir Filter VHDL code
    Text: QuickDSPTM Family Data Sheet QuickDSP: Combining Embedded DSP Blocks, Performance, Density, and Embedded RAM Features Dual Port SRAM QMAC Blocks • Up to 18 Embedded Computational Units, ECUTM ■ Integrated multiply, add, accumulate functions ■ 8-bit multiplier, 16-bit adder with carry


    Original     		16-bit 8 bit Array multiplier code in VERILOG vhdl code for radix-4 fft ecu input and output vhdl code of 32bit floating point adder IESS-309 vhdl code of floating point adder ecu BLOCK DIAGRAM vhdl code for ieee 754 32-bit floating point adder ieee floating point multiplier verilog low pass fir Filter VHDL code PDF

    SHA-256 Cryptographic Accelerator

    Abstract: verilog code for 128 bit AES encryption CS5311 SHA-1 using vhdl SHA-256 verilog code for 8 bit AES encryption verilog code for aes encryption SHA-512 SHA256 verilog code for 32 bit AES encryption
    Text: CS5310/11/12 Standard Hash Algorithm SHA-1 & SHA-2 Cores TM Virtual Components for the Converging World The CS5310/11/12 Hashing Cores are designed to achieve data authentication in digital broadband, wireless, and multimedia systems. These high performance application specific silicon cores support the Secure Hash


    Original     		CS5310/11/12 CS5310/11/12 CS5310 CS5311 SHA-256 DS5310 SHA-256 Cryptographic Accelerator verilog code for 128 bit AES encryption SHA-1 using vhdl verilog code for 8 bit AES encryption verilog code for aes encryption SHA-512 SHA256 verilog code for 32 bit AES encryption PDF