PT532-1
Abstract: SM531-1 SM531-1E
Text: 32-1 PT5 Features • Designed to meet UL1950 and EN60950 supplementary insulation requirements for operating voltages up to 250 Vrms ■ For use with Analog Device’s AD20msp918 ADSL chipsets 1-1 SM53 ■ Excellent Total Harmonic Distortion THD Applications
|
Original
|
UL1950
EN60950
AD20msp918
AD20msp918
SM531-1
PT532-1
SM531-1E.
PT532-1
/SP0207
SM531-1
SM531-1E
|
PDF
|
PT539-1
Abstract: SM538-1E
Text: 39-1 PT5 Features • Designed to meet UL1950 and EN60950 supplementary insulation requirements for operating voltages up to 250 Vrms ■ For use with Analog Device’s AD20msp910 / AD20msp918 ADSL chipsets ■ Excellent Total Harmonic Distortion THD performance in a small size
|
Original
|
UL1950
EN60950
AD20msp910
AD20msp918
AD20msp910/918
SM538-1
PT539-1
SM538-1E.
PT539-1
/SP0207
SM538-1E
|
PDF
|
Untitled
Abstract: No abstract text available
Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.6, September 2013 iCE40 LP/HX Family Data Sheet Introduction August 2013 Data Sheet DS1040 Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device
|
Original
|
iCE40â
DS1040
iCE40
DS1040
|
PDF
|
Untitled
Abstract: No abstract text available
Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.7, October 2013 iCE40 LP/HX Family Data Sheet Introduction October 2013 Data Sheet DS1040 Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device
|
Original
|
iCE40â
DS1040
iCE40
DS1040
iCE40-1K
iCE40LP/HX1K
iCE40LP640
|
PDF
|
Untitled
Abstract: No abstract text available
Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.5, August 2013 iCE40 LP/HX Family Data Sheet Introduction August 2013 Data Sheet DS1040 Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device
|
Original
|
iCE40â
DS1040
iCE40
DS1040
Distribut2013
|
PDF
|
SM56
Abstract: SM561-1 SM561-1E SM562-1
Text: Features 1-1 SM56 • Designed to meet UL1950 and EN60950 supplementary insulation requirements for operating voltages up to 250 Vrms ■ For use with Analog Device’s AD20msp930 ADSL chipsets ■ Excellent Total Harmonic Distortion THD performance ■ SMT package and small size
|
Original
|
UL1950
EN60950
AD20msp930
AD20msp930
SM561-1
SM562-1
SM562-1
SM561-1E.
SM56
SM561-1
SM561-1E
|
PDF
|
SM537-1
Abstract: SM537-1E
Text: 7-1 SM53 Features • Operating temperature -40 °C to +85 °C ■ For use with Analog Device’s ■ Designed to meet UL1950 and EN60950 AD20msp930 ADSL chipset Central Office ■ Excellent Total Harmonic Distortion (THD) performance ■ SMT and small size package
|
Original
|
UL1950
EN60950
AD20msp930
AD20msp930
SM537-1
SM537-1E.
/SP0207
SM537-1E
|
PDF
|
PT563-1
Abstract: PT564-1
Text: Features 3-1 T56 P • Designed to meet UL1950 and EN60950 ■ For use with Analog Device’s AD20msp930 ADSL chipsets ■ Excellent Total Harmonic Distortion THD performance ■ Thru-hole package and small size ■ Operating temperature -40 °C to +85 °C
|
Original
|
UL1950
EN60950
AD20msp930
AD20msp930
PT563-1
PT564-1
PT564-1
PT563-1
|
PDF
|
ICE40 lattice
Abstract: ICE40 FPGA 0.4mm pitch BGA routing TN1251 ICE40LP1K ICE40LP1K-CM36 GDDR71 pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm ICE40LP384SG32
Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.2, April 2013 iCE40 LP/HX Family Data Sheet Introduction April 2013 Data Sheet DS1040 Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device Flexible Logic Architecture
|
Original
|
iCE40TM
DS1040
iCE40
DS1040
ICE40 lattice
ICE40 FPGA
0.4mm pitch BGA routing
TN1251
ICE40LP1K
ICE40LP1K-CM36
GDDR71
pitch 0.4mm BGA
0.4mm pitch 2.5x2.5mm
ICE40LP384SG32
|
PDF
|
Untitled
Abstract: No abstract text available
Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.4, July 2013 iCE40 LP/HX Family Data Sheet Introduction July 2013 Data Sheet DS1040 Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device Flexible Logic Architecture
|
Original
|
iCE40â
DS1040
iCE40
DS1040
|
PDF
|
LATTICE SEMICONDUCTOR Tape and Reel Specification
Abstract: LVDS25E 0.4mm pitch BGA routing ICE40 FPGA pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm
Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.3, May 2013 iCE40 LP/HX Family Data Sheet Introduction April 2013 Data Sheet DS1040 Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device Flexible Logic Architecture
|
Original
|
iCE40TM
DS1040
iCE40
DS1040
LATTICE SEMICONDUCTOR Tape and Reel Specification
LVDS25E
0.4mm pitch BGA routing
ICE40 FPGA
pitch 0.4mm BGA
0.4mm pitch 2.5x2.5mm
|
PDF
|
SM537-1E
Abstract: SM537-1EL SM537-1L
Text: *R oH S CO M PL IA NT Features 7-1L SM53 • For use with Analog Device’s AD20msp930 ■ Operating temperature -40 °C to +85 °C ADSL chipset CO ■ Excellent Total Harmonic Distortion (THD) performance ■ SMT and small size package ■ Designed to meet UL1950 and EN60950
|
Original
|
AD20msp930
UL1950
EN60950
SM537-1L
SM537-1E
SM537-1EL.
2002/95/EC
SM537-1EL
|
PDF
|
sm56
Abstract: No abstract text available
Text: *R oH S CO M PL IA NT Features 1-1L SM56 • For use with Analog Device’s AD20msp930 ■ Designed to meet UL1950 and EN60950 ADSL chipsets ■ Excellent Total Harmonic Distortion THD performance ■ SMT package and small size ■ Operating temperature -40 °C to +85 °C
|
Original
|
AD20msp930
UL1950
EN60950
SM561-1L
SM562-1L
SM562-1L
SM561-1EL.
SM56x-1E
sm56
|
PDF
|
Untitled
Abstract: No abstract text available
Text: *R oH S CO M PL IA NT Features 7-1L SM53 • For use with Analog Device’s AD20msp930 ■ Operating temperature -40 °C to +85 °C ADSL chipset CO ■ Excellent Total Harmonic Distortion (THD) performance ■ SMT and small size package ■ Designed to meet UL1950 and EN60950
|
Original
|
AD20msp930
UL1950
EN60950
SM537-1L
SM537-1L
SM537-1E
2002/95/EC
|
PDF
|
|
Untitled
Abstract: No abstract text available
Text: *R oH S CO M PL IA NT Features L 63-1 PT5 • For use with Analog Device’s AD20msp930 ■ Operating temperature -40 °C to +85 °C ADSL chipsets ■ Excellent Total Harmonic Distortion THD performance ■ Thru-hole package and small size ■ Designed to meet UL1950 and EN60950
|
Original
|
UL1950
EN60950
AD20msp930
PT563-1L
PT564-1L
PT564-1L
74-1L
|
PDF
|
PT563-1
Abstract: PT564-1
Text: oH V SC AV ER OM AI SIO PL LA N IA BL S NT E *R Features • For use with Analog Device’s 3-1 6 PT5 AD20msp930 ADSL chipsets ■ Excellent Total Harmonic Distortion THD performance ■ Thru-hole package and small size ■ Designed to meet UL1950 and EN60950
|
Original
|
AD20msp930
UL1950
EN60950
AD20msp930
PT563-1
PT564-1
PT564-1
PT56X-1
PT563-1
|
PDF
|
PT539-1
Abstract: PT539-1L SM538-1E
Text: NT 9-1L *R oH S CO M PL IA 3 PT5 8-1L SM53 Features • For use with Analog Device’s AD20msp910 / ■ Designed to meet UL1950 and EN60950 AD20msp918 ADSL chipsets ■ Excellent Total Harmonic Distortion THD performance in a small size ■ SMT and thru-hole package version
|
Original
|
AD20msp910
UL1950
EN60950
AD20msp918
AD20msp910/918
SM538-1L
PT539-1L
SM538-1EL.
PT539-1L
SM538-1E
PT539-1
|
PDF
|
SMD 1L
Abstract: PT532-1 PT532-1L SM531-1E SM531-1EL 1EL BOURNS
Text: IA NT Features PL L 32-1 *R oH S CO M PT5 1-1L SM53 • For use with Analog Device’s AD20msp918 ■ Operating temperature 0 °C to +70 °C ADSL chipsets ■ Excellent Total Harmonic Distortion THD performance in a small size ■ Both SMD and thru-hole package version
|
Original
|
AD20msp918
UL1950
EN60950
SM531-1L
PT532-1L
SM531-1EL.
PT532-1L
SM531-1E
PT532-1
SMD 1L
SM531-1EL
1EL BOURNS
|
PDF
|
SM537-1
Abstract: SM537-1E
Text: oH V SC AV ER OM AI SIO PL LA N IA BL S NT E *R • Operating temperature -40 °C to +85 °C ■ Lead free version available see How to Features ■ For use with Analog Device’s Order AD20msp930 ADSL chipset (CO) 1 M537- S ■ Excellent Total Harmonic Distortion
|
Original
|
AD20msp930
M537-
UL1950
EN60950
AD20msp930
SM537-1
SM537-1E
SM537-1E.
2002/95/EC
SM537-1E
|
PDF
|
PT532-1
Abstract: SM531-1 SM531-1E m531
Text: oH V SC AV ER OM AI SIO PL LA N IA BL S NT E 2-1 *R 3 PT5 1 M531- Features • Operating temperature 0 °C to +70 °C ■ Lead free version available see How to ■ For use with Analog Device’s AD20msp918 ADSL chipsets Order ■ Lead free versions are RoHS compliant*
|
Original
|
M531-
AD20msp918
UL1950
EN60950
AD20msp918
SM531-1
PT532-1
SM531-1E.
PT532-1
SM531-1E
SM531-1
m531
|
PDF
|
SM56
Abstract: SM561-1 SM561-1E SM562-1
Text: oH V SC AV ER OM AI SIO PL LA N IA BL S NT E *R • Designed to meet UL1950 and EN60950 Features ■ For use with Analog Device’s 1-1 SM56 AD20msp930 ADSL chipsets ■ Excellent Total Harmonic Distortion THD performance ■ SMT package and small size ■ Operating temperature -40 °C to +85 °C
|
Original
|
UL1950
EN60950
AD20msp930
AD20msp930
SM561-1
SM562-1
SM562-1
SM56x-1E
SM561-1E.
SM56
SM561-1
SM561-1E
|
PDF
|
sop st datecode
Abstract: IR RC5 encoder PIC dmx512 decoder RC6 philips decoder pic dmx-512 dmx512 pic DMX512 DECODER TO PWM philips RC6 decoder caller id pic pc dtmf decoder with pic
Text: PRELIMINARY June 16, 1999 Datecode yywwxx SX18AC75 /SX20AC75/SX28AC75/SX28AC100 High-Performance 8-Bit Microcontrollers with EE/Flash Program Memory and In-System Programming Capability 1.0 1.1 PRODUCT OVERVIEW Introduction 1.2 The SX18AC75, SX20AC75, SX28AC75,
|
Original
|
SX18AC75
/SX20AC75/SX28AC75/SX28AC100
SX18AC75,
SX20AC75,
SX28AC75,
SX28AC100
100MHz
SXL-DS02-02
sop st datecode
IR RC5 encoder PIC
dmx512 decoder
RC6 philips decoder
pic dmx-512
dmx512 pic
DMX512 DECODER TO PWM
philips RC6 decoder
caller id pic pc
dtmf decoder with pic
|
PDF
|
ADCMP371
Abstract: TA 8268 analog SLG7LB371 LMV7251 MCP6562 analog lot id ANALOG DEVICES ASSEMBLY DATE CODE
Text: SLG7LB371 GreenLIBTM SINGLE COMPARATOR WITH PUSH-PULL OUTPUT General Description Features The GreenLIB provides single comparator with push-pull • Pb-Free / RoHS Compliant output. An internal hysteresis ensures clean output • Halogen-Free switching, even with slow moving input signals. The push-pull
|
Original
|
SLG7LB371
000-00SLG7LB371-11
ADCMP371
TA 8268 analog
SLG7LB371
LMV7251
MCP6562
analog lot id
ANALOG DEVICES ASSEMBLY DATE CODE
|
PDF
|
ta 8268
Abstract: SLG7LB370 TDFN-8 MCP6566U MCP6567 ADCMP370 LMV7255 MCP6566 TA 8268 analog ANALOG DEVICES ASSEMBLY DATE CODE
Text: SLG7LB370 GreenLIBTM SINGLE COMPARATOR WITH OPEN-DRAIN OUTPUT General Description Features The GreenLIB provides single comparator with open-drain • Pb-Free / RoHS Compliant output. This allows the connection of an external resistor at • Halogen-Free the output. The output of the comparator can be used as a
|
Original
|
SLG7LB370
000-00SLG7LB370-11
ta 8268
SLG7LB370
TDFN-8
MCP6566U
MCP6567
ADCMP370
LMV7255
MCP6566
TA 8268 analog
ANALOG DEVICES ASSEMBLY DATE CODE
|
PDF
|