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    ICE40LP384SG32 Search Results

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    ICE40LP384SG32 Price and Stock

    Lattice Semiconductor Corporation ICE40LP384-SG32TR

    IC FPGA 21 I/O 32QFN
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    DigiKey ICE40LP384-SG32TR Reel 20,000
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    Mouser Electronics ICE40LP384-SG32TR
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    Verical ICE40LP384-SG32TR 4,000 4,000
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    Newark ICE40LP384-SG32TR Reel 20,000
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    Flip Electronics ICE40LP384-SG32TR 24,000
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    Vyrian ICE40LP384-SG32TR 13,976
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    Lattice Semiconductor Corporation ICE40LP384-SG32TR1K

    IC FPGA 21 I/O 32QFN
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey ICE40LP384-SG32TR1K Reel 10,000
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    Mouser Electronics ICE40LP384-SG32TR1K
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    Newark ICE40LP384-SG32TR1K Reel 10,000
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    Flip Electronics ICE40LP384-SG32TR1K 52,000
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    Vyrian ICE40LP384-SG32TR1K 51,542
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    Lattice Semiconductor Corporation ICE40LP384-SG32

    FPGA - Field Programmable Gate Array iCE40LP Ultra LowPwr 384 LUTs 1.2V
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics ICE40LP384-SG32 6,131
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    Verical ICE40LP384-SG32 7,620 4
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    • 100 $1.933
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    ICE40LP384-SG32 3,803 3
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    Arrow Electronics ICE40LP384-SG32 7,620 16 Weeks 1
    • 1 $2.388
    • 10 $2.388
    • 100 $1.933
    • 1000 $1.933
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    ICE40LP384-SG32 3,803 16 Weeks 1
    • 1 $2.036
    • 10 $2.036
    • 100 $1.967
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    Newark ICE40LP384-SG32 Bulk 8,609 1
    • 1 $2.67
    • 10 $2.48
    • 100 $2.1
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    Flip Electronics ICE40LP384-SG32 27,257
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    Vyrian ICE40LP384-SG32 8,575
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    Win Source Electronics ICE40LP384-SG32 40,152
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    • 100 $2.732
    • 1000 $2.45
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    ICE40LP384SG32 Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    ICE40LP384-SG32 Lattice Semiconductor Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 21 I/O 32QFN Original PDF
    ICE40LP384-SG32TR Lattice Semiconductor Integrated Circuits (ICs) - Embedded - FPGAs (Field Programmable Gate Array) - IC FPGA 21 I/O 32QFN Original PDF
    ICE40LP384-SG32TR1K Lattice Semiconductor Integrated Circuits (ICs) - Embedded - FPGAs (Field Programmable Gate Array) - IC FPGA 21 I/O 32QFN Original PDF

    ICE40LP384SG32 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.9, April 2014 iCE40 LP/HX Family Data Sheet Introduction February 2014 Data Sheet DS1040 Features  Flexible Logic Architecture – Schmitt trigger inputs, to 200 mV typical hysteresis • Programmable pull-up mode


    Original     		iCE40â DS1040 iCE40 DS1040 LP384 PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.5, August 2013 iCE40 LP/HX Family Data Sheet Introduction August 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device


    Original     		iCE40â DS1040 iCE40 DS1040 Distribut2013 PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.4, July 2013 iCE40 LP/HX Family Data Sheet Introduction July 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device  Flexible Logic Architecture


    Original     		iCE40â DS1040 iCE40 DS1040 PDF

    LATTICE SEMICONDUCTOR Tape and Reel Specification

    Abstract: LVDS25E 0.4mm pitch BGA routing ICE40 FPGA pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.3, May 2013 iCE40 LP/HX Family Data Sheet Introduction April 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device  Flexible Logic Architecture


    Original     		iCE40TM DS1040 iCE40 DS1040 LATTICE SEMICONDUCTOR Tape and Reel Specification LVDS25E 0.4mm pitch BGA routing ICE40 FPGA pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.6, September 2013 iCE40 LP/HX Family Data Sheet Introduction August 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device


    Original     		iCE40â DS1040 iCE40 DS1040 PDF

    ICE40 lattice

    Abstract: ICE40 FPGA 0.4mm pitch BGA routing TN1251 ICE40LP1K ICE40LP1K-CM36 GDDR71 pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm ICE40LP384SG32
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.2, April 2013 iCE40 LP/HX Family Data Sheet Introduction April 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device  Flexible Logic Architecture


    Original     		iCE40TM DS1040 iCE40 DS1040 ICE40 lattice ICE40 FPGA 0.4mm pitch BGA routing TN1251 ICE40LP1K ICE40LP1K-CM36 GDDR71 pitch 0.4mm BGA 0.4mm pitch 2.5x2.5mm ICE40LP384SG32 PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.7, October 2013 iCE40 LP/HX Family Data Sheet Introduction October 2013 Data Sheet DS1040  Flexible On-Chip Clocking Features • Eight low-skew global clock resources • Up to two analog PLLs per device


    Original     		iCE40â DS1040 iCE40 DS1040 iCE40-1K iCE40LP/HX1K iCE40LP640 PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 3.0, July 2014 iCE40 LP/HX Family Data Sheet Introduction February 2014 Data Sheet DS1040 Features  Flexible Logic Architecture – Schmitt trigger inputs, to 200 mV typical hysteresis • Programmable pull-up mode


    Original     		iCE40â DS1040 iCE40 DS1040 iCE40LP1K. PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX/LM Family Handbook HB1011 Version 01.2, November 2013 iCE40 LP/HX/LM Family Handbook Table of Contents October 2013 Section I. iCE40 LP/HX Family Data Sheet Introduction Features . 1-1


    Original     		iCE40â HB1011 iCE40 TN1251 PDF

    Untitled

    Abstract: No abstract text available
    Text: iCE40 LP/HX Family Data Sheet DS1040 Version 02.8, February 2014 iCE40 LP/HX Family Data Sheet Introduction February 2014 Data Sheet DS1040 Features – Schmitt trigger inputs, to 200 mV typical hysteresis • Programmable pull-up mode  Flexible Logic Architecture


    Original     		iCE40â DS1040 iCE40 DS1040 iCE40-1K iCE40LP/HX1K iCE40LP640 iCE40LP1K PDF