BG256
Abstract: BG352 352-LEAD
Text: Package Diagrams Ball Grid Array Packages 119-Lead FBGA 14 x 22 x 2.4 mm BG119 51-85115 1 Package Diagrams 256-Lead Ball Grid Array (27 x 27 x 2.33 mm) BG256 51-85097 2 Package Diagrams 352-Lead Ball Grid Array (35 x 35 x 2.33 mm) BG352 51-85103 3
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119-Lead
BG119
256-Lead
BG256
352-Lead
BG352
BG256
BG352
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Diagrams
Abstract: 5185143 BG-272 mold cap BG256 BG352 BG-209 Package Diagrams 14X22
Text: Package Diagrams Ball Grid Array Packages 119-Lead PBGA 14 x 22 x 2.4 mm BG119 51-85115-*A 1 Package Diagrams 209-Lead PBGA (14 x 22 x 2.20 mm) BG209 51-85143-*A 2 Package Diagrams 256-Lead PBGA (27 x 27 x 2.33 mm) BG256 51-85097-*A 3 Package Diagrams 272-Lead Ball Grid Array (27 x 27 x 2.33 mm) BG272
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119-Lead
BG119
209-Lead
BG209
256-Lead
BG256
272-Lead
BG272
388-Lead
BG352
Diagrams
5185143
BG-272
mold cap
BG256
BG352
BG-209
Package Diagrams
14X22
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BG-272
Abstract: 5185130
Text: Package Diagrams Ball Grid Array Packages 119-Lead FBGA 14 x 22 x 2.4 mm BG119 51-85115 1 Package Diagrams 256-Lead Ball Grid Array (27 x 27 x 2.33 mm) BG256 51-85097 2 Package Diagrams 272-Lead Ball Grid Array (27 x 27 x 2.33 mm) BG272 51-85130 3 Package Diagrams
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119-Lead
BG119
256-Lead
BG256
272-Lead
BG272
352-Lead
BG352
BG-272
5185130
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Untitled
Abstract: No abstract text available
Text: CY7C1347G 4-Mbit 128 K x 36 Pipelined Sync SRAM 4-Mbit (128 K × 36) Pipelined Sync SRAM Features Functional Description • Fully registered inputs and outputs for pipelined operation ■ 128 K × 36 common I/O architecture ■ 3.3 V core power supply (VDD)
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CY7C1347G
CY7C1347G
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DSC5002
Abstract: No abstract text available
Text: 256K x 36, 512K x 18 2.5V Synchronous ZBTTM SRAMs 2.5V I/O, Burst Counter Pipelined Outputs Features u 256K x 36, 512K x 18 memory configurations u Supports high performance system speed - 200 MHz Address and control signals are applied to the SRAM during one
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IDT71T65612/5812
IDT71T65612/5812
BG119
BQ165
x4033
DSC5002
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IDT71V3576
Abstract: IDT71V3578
Text: 128K x 36, 256K x 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Preliminary IDT71V3576 IDT71V3578 Description 128K x 36, 256K x 18 memory configurations Supports high system speed:
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IDT71V3576
IDT71V3578
150MHz
133MHz
100-pin
BG119
BQ165
x4033
IDT71V3576
IDT71V3578
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IDT71V2556
Abstract: IDT71V2558
Text: 128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs Preliminary IDT71V2556 IDT71V2558 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ cycle, and two cycles later the associated data cycle occurs, be it read
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IDT71V2556
IDT71V2558
IDT71V2556/58
165fBGA
BG119
BQ165
x4033
IDT71V2556
IDT71V2558
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Untitled
Abstract: No abstract text available
Text: 256K x 36, 512K x 18 2.5V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Flow-Through Outputs Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Preliminary IDT71T65702 IDT71T65902 it read or write. The IDT71T65702/5902 contain address, data-in and control signal
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IDT71T65702
IDT71T65902
IDT71T65702/5902
IDT71T65702/5902
BG119
BQ165
x4033
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IDT71V67602
Abstract: IDT71V67802
Text: 256K X 36, 512K X 18 3.3V Synchronous SRAMs 2.5V I/O, Burst Counter Pipelined Outputs, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Advance Information IDT71V67602 IDT71V67802 256K x 36/512K x 18. The IDT71V676/78 SRAMs contain write, data,
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IDT71V67602
IDT71V67802
36/512K
IDT71V676/78
IDT71V67602/7802
BQ165
BG119
x4033
IDT71V67602
IDT71V67802
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IDT71T67702
Abstract: IDT71T67902
Text: 256K X 36, 512K X 18 Advance 2.5V Synchronous SRAMs Information 2.5V I/O, Burst Counter IDT71T67702 Flow-Through Outputs, Single Cycle Deselect IDT71T67902 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ data, address and control registers. There are no registers in the data
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IDT71T67702
IDT71T67902
IDT71T67702/7902
BQ165
BG119
x4033
IDT71T67702
IDT71T67902
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Untitled
Abstract: No abstract text available
Text: CY7C1361A CY7C1363A 256K x 36/512K x 18 Synchronous Flow-Thru Burst SRAM Features • • • • • • • • • • • • • • • • • • Fast access times: 6.0, 6.5, 7.0, and 8.0ns Fast clock speed: 150, 133, 117, and 100MHz Fast OE access times: 3.5 ns and 4.0 ns
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CY7C1361A
CY7C1363A
36/512K
100MHz
CY7C1361A/CY7C1363A
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71V2578
Abstract: No abstract text available
Text: 128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V2576S IDT71V2578S IDT71V2576SA IDT71V2578SA Description 128K x 36, 256K x 18 memory configurations
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IDT71V2576S
IDT71V2578S
IDT71V2576SA
IDT71V2578SA
150MHz
133MHz
100-pin
x4033
71V2578
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CY7C1386C
Abstract: CY7C1387C
Text: CY7C1386C CY7C1387C 18-Mb 512K x 36/1M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 225, 200 and 167 MHz • Registered inputs and outputs for pipelined operation
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CY7C1386C
CY7C1387C
18-Mb
36/1M
250-MHz
CY7C1386C/CY7C1387C
CY7C1386C
CY7C1387C
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A23 1101 01A
Abstract: No abstract text available
Text: 128K x 36, 256K x 18, 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter, Flow-Through Outputs Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V3557S IDT71V3559S IDT71V3557SA IDT71V3559SA it read or write. The IDT71V3557/59 contain address, data-in and control signal
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IDT71V3557S
IDT71V3559S
IDT71V3557SA
IDT71V3559SA
IDT71V3557/59
IDT71V3557/59
BG119
BQ165
BQ165
A23 1101 01A
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CY7C1360C-250BGC
Abstract: CY7C1360C CY7C1362C CY7C1360C-166BZI
Text: CY7C1360C CY7C1362C PRELIMINARY 9-Mbit 256K x 36/512K x 18 Pipelined SRAM Functional Description[1] Features • • • • • • • • • • • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 166 MHz
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CY7C1360C
CY7C1362C
36/512K
250-MHz
200-MHz
166-MHz
CY7C1360C-250BGC
CY7C1360C
CY7C1362C
CY7C1360C-166BZI
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IDT71V25761
Abstract: IDT71V25781 71V25761 71V2578
Text: 128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V25761 IDT71V25781 Description 128K x 36, 256K x 18 memory configurations Supports high system speed:
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IDT71V25761
IDT71V25781
200MHz
183MHz
166MHz
100-pin
BG119
BQ165
IDT71V25761
IDT71V25781
71V25761
71V2578
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CY7C1325G
Abstract: CY7C1325G-133AXC CY7C1325G-133AXI CY7C1325G-133BGC CY7C1325G-133BGI CY7C1325G-133BGXC CY7C1325G-133BGXI
Text: CY7C1325G PRELIMINARY 4-Mbit 256K x 18 Flow-Through Sync SRAM Functional Description[1] Features • 256K X 18 common I/O • 3.3V –5% and +10% core power supply (VDD) • 2.5V or 3.3V I/O supply (VDDQ) • Fast clock-to-output times — 6.5 ns (133-MHz version)
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CY7C1325G
133-MHz
117-MHz
100-MHz
100-pin
119-ball
CY7C1325G
CY7C1325G-133AXC
CY7C1325G-133AXI
CY7C1325G-133BGC
CY7C1325G-133BGI
CY7C1325G-133BGXC
CY7C1325G-133BGXI
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IDT71V65702
Abstract: IDT71V65902
Text: 256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Flow-Through Outputs Preliminary IDT71V65702 IDT71V65902 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 256K x 36, 512K x 18 memory configurations Supports high performance system speed - 100 MHz
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IDT71V65702
IDT71V65902
BG119
BQ165
IDT71V656xx
IDT71V658xx
x4033
IDT71V65702
IDT71V65902
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CY7C1327B
Abstract: No abstract text available
Text: 327 CY7C1327B 256K x 18 Synchronous-Pipelined Cache RAM Features The CY7C1327B I/O pins can operate at either the 2.5V or the 3.3V level. The I/O pins are 3.3V tolerant when VDDQ=2.5V. • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states
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CY7C1327B
CY7C1327B
100-MHz
166-MHz
166-Mpress
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CY7C1381B-100AI
Abstract: 381B CY7C1381B CY7C1381B-117AC CY7C1383B
Text: 381B CY7C1381B CY7C1383B 512 x 36/1M × 18 Flow-Thru SRAM Features • • • • • • • • • • • Fast access times: 7.5, 8.5, 10.0 ns Fast clock speed: 117, 100, 83 MHz Provide high-performance 3-1-1-1 access rate Optimal for depth expansion
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CY7C1381B
CY7C1383B
36/1M
CY7C1381B/CY7C1383B
x36/1M
CY7C1381B-100AI
381B
CY7C1381B
CY7C1381B-117AC
CY7C1383B
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80486 microprocessor block diagram and pin diagram
Abstract: CY7C1338B
Text: 338B CY7C1338B 128K x 32 Synchronous-Flow-Through 3.3V Cache RAM Features Functional Description • Supports 117-MHz microprocessor cache systems with zero wait states • 128K by 32 common I/O • Fast clock-to-output times — 7.5 ns 117-MHz version • Two-bit wraparound counter supporting either interleaved or linear burst sequence
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CY7C1338B
117-MHz
100-pin
CY7C1338B
80486 microprocessor block diagram and pin diagram
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CY7C1327G
Abstract: CY7C1327G-250AXC CY7C1327G-250AXI CY7C1327G-250BGC CY7C1327G-250BGI CY7C1327G-250BGXC CY7C1327G-250BGXI
Text: CY7C1327G PRELIMINARY 4-Mbit 256K x 18 Pipelined Sync SRAM Functional Description[1] Features • Registered inputs and outputs for pipelined operation • 256K x18 common I/O architecture • 3.3V core power supply • 3.3V / 2.5V I/O operation • Fast clock-to-output times
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CY7C1327G
250-MHz
225-MHz
200-MHz
CY7C1327G
CY7C1327G-250AXC
CY7C1327G-250AXI
CY7C1327G-250BGC
CY7C1327G-250BGI
CY7C1327G-250BGXC
CY7C1327G-250BGXI
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GVT71256ZC36B-7.5
Abstract: CY7C1356A-100AC CY7C1356A GVT71512ZC18
Text: PRELIMINARY CY7C1354A/GVT71256ZC36 CY7C1356A/GVT71512ZC18 256Kx36/512Kx18 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between write and read cycles • Fast clock speed: 200, 166, 133, and 100 MHz • Fast access time: 3.2, 3.6, 4.2, 5.0 ns
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CY7C1354A/GVT71256ZC36
CY7C1356A/GVT71512ZC18
256Kx36/512Kx18
GVT71256ZC36B-7.5
CY7C1356A-100AC
CY7C1356A
GVT71512ZC18
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CY7C1381A
Abstract: CY7C1381A-100AC CY7C1381A-117AC CY7C1381A-83AC
Text: CY7C1381A CY7C1383A PRELIMINARY 512K x 36 / 1M x 18 Flow-Thru SRAM Features • • • • • • • • • • • Fast access times: 7.5, 8.5, 9.0, 10.0 ns Fast clock speed: 117, 100, 83, 66 MHz Provide high-performance 3-1-1-1 access rate Optimal for depth expansion
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CY7C1381A
CY7C1383A
CY7C1381A
CY7C1381A-100AC
CY7C1381A-117AC
CY7C1381A-83AC
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