Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    BIT MAPPER Search Results

    BIT MAPPER Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CDP1853CD/B Rochester Electronics LLC CDP1853CD - N-Bit 1 of 8 Decoder Visit Rochester Electronics LLC Buy
    ADSP-2111BS-66 Rochester Electronics LLC Digital Signal Processor, 24-Ext Bit, 16.67MHz, CMOS, PQFP100, METRIC, PLASTIC, QFP-100 Visit Rochester Electronics LLC Buy
    ADSP-2111BS-80 Rochester Electronics LLC Digital Signal Processor, 24-Ext Bit, 20MHz, CMOS, PQFP100, METRIC, PLASTIC, QFP-100 Visit Rochester Electronics LLC Buy
    74FST163P245PV Renesas Electronics Corporation BIT BUS SWITCH Visit Renesas Electronics Corporation
    74FST163P245PV8 Renesas Electronics Corporation BIT BUS SWITCH Visit Renesas Electronics Corporation

    BIT MAPPER Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    GR-253

    Abstract: TMPR28051
    Text: Advisory August 5, 1999 TMPR28051 STS-1/AU-3 STM-0 Mapper Device Advisory for Version 5 of the Device Register Architecture (RA) Map RA-1. Reset Bit The software reset bit (bit 0) of register 0x00 is not functional. RA-2. Transmit Path AIS Insert Bit The TXPAISINS bit (bit 5) of register 0x01 produces both AIS-P and AIS-L.


    Original     		PDF TMPR28051 DS02-245BBAC DS99-068SONT) GR-253

    25e5

    Abstract: GR253-CORE GR-253 TMPR28051 VT13 GR-253 J0 byte length 14
    Text: Advisory August 5, 1999 TMPR28051 STS-1/AU-3 STM-0 Mapper Device Advisory for Version 5 of the Device Register Architecture (RA) Map RA-1. Reset Bit The software reset bit (bit 0) of register 0x00 is not functional. RA-2. Transmit Path AIS Insert Bit The TXPAISINS bit (bit 5) of register 0x01 produces both AIS-P and AIS-L.


    Original     		PDF TMPR28051 DS99-068SONT DS98-100TIC) 25e5 GR253-CORE GR-253 VT13 GR-253 J0 byte length 14

    STS-192

    Abstract: STS-48 VSC9112
    Text: SONET/SDH IP/ATM Framer and Mapper Framers and Mappers VSC9112 Product Brief Features: System / Packet Interface • 32-bit Industry Compliant POS-PHY-3, Single-PHY Packet Interface • 32-bit Industry Compliant UTOPIA-3, Single-PHY Cell Interface Physical Layer Channelization


    Original     		PDF VSC9112 32-bit STS-48c STM-16c 16-bit STS-192 VSC9112 STS-48

    DMX chip

    Abstract: DMX single chip controller STS-192 STS-48 VSC9142
    Text: SONET/SDH IP/ATM Framer and Mapper VSC9142 Framers and Mappers Product Brief Features: System / Packet Interface • 32-bit Industry Compliant POS-PHY-3, Single-PHY Packet Interface • 32-bit Industry Compliant UTOPIA-3, Single-PHY Cell Interface Physical Layer Channelization


    Original     		PDF VSC9142 32-bit STS-48c STM-16c VSC9142 320-pin DMX chip DMX single chip controller STS-192 STS-48

    hdlc

    Abstract: PM5383 PM8316 E1 frame POS-PHY ATM format
    Text: PM5383 S/UNI 12xJET Preliminary 12-Channel ATM and Bit HDLC User Network Interface MODES OF OPERATION FEATURES • Single chip 12-channel DS3/E3/J2 framer and ATM / bit-HDLC mapper into POS-PHY / UTOPIA interface. Each channel can be individually configured for the desired rate and


    Original     		PDF PM5383 12xJET 12-Channel STS-3c/STM-1/STS-12c/STM-4-4c PM7388 336A1024 PM8316 PMC-2010377 hdlc PM5383 PM8316 E1 frame POS-PHY ATM format

    POS-PHY utopia

    Abstract: POS-PHY ATM format hdlc E1 frame
    Text: PM5386 S/UNI 4xJET Preliminary 4-Channel ATM and Bit HDLC User Network Interface MODES OF OPERATION FEATURES • Single chip 4-channel DS-3/E3/J2 framer and ATM/bit-HDLC mapper into POS-PHY/Utopia interface. Each channel can be individually configured for the desired rate and data format.


    Original     		PDF PM5386 M5386 PMC-2021631 POS-PHY utopia POS-PHY ATM format hdlc E1 frame

    Untitled

    Abstract: No abstract text available
    Text: ADS5296A www.ti.com SBAS631 – OCTOBER 2013 10-Bit, 200-MSPS, 4-Channel and 12-Bit, 80-MSPS, 8-Channel Analog-to-Digital Converter Check for Samples: ADS5296A FEATURES DESCRIPTION • The ADS5296A is a low-power, 12-bit, 8-channel, analog-to-digital converter ADC with sample rates


    Original     		PDF ADS5296A SBAS631 10-Bit, 200-MSPS, 12-Bit, 80-MSPS, ADS5296A

    Untitled

    Abstract: No abstract text available
    Text: ADS5296A www.ti.com SBAS631 – OCTOBER 2013 10-Bit, 200-MSPS, 4-Channel and 12-Bit, 80-MSPS, 8-Channel Analog-to-Digital Converter Check for Samples: ADS5296A FEATURES DESCRIPTION • The ADS5296A is a low-power, 12-bit, 8-channel, analog-to-digital converter ADC with sample rates


    Original     		PDF ADS5296A SBAS631 10-Bit, 200-MSPS, 12-Bit, 80-MSPS, ADS5296A

    Untitled

    Abstract: No abstract text available
    Text: ADS5296A www.ti.com SBAS631 – OCTOBER 2013 10-Bit, 200-MSPS, 4-Channel and 12-Bit, 80-MSPS, 8-Channel Analog-to-Digital Converter Check for Samples: ADS5296A FEATURES DESCRIPTION • The ADS5296A is a low-power, 12-bit, 8-channel, analog-to-digital converter ADC with sample rates


    Original     		PDF ADS5296A SBAS631 10-Bit, 200-MSPS, 12-Bit, 80-MSPS, ADS5296A

    n117

    Abstract: No abstract text available
    Text: DS3F Device DS3 Framer TXC-03401B DATA SHEET • DS3 payload access, bit-serial or nibble-parallel • C-bit parity or M13 operating mode • C-bit interface 13 C-bits in, 14 out • Detect and generate DS3 AIS, and idle signals • Transmit reference generator for serial operation


    Original     		PDF TXC-03401B TXC-03401B-MB n117

    Untitled

    Abstract: No abstract text available
    Text: ADS5296 www.ti.com SBAS606A – MAY 2013 – REVISED MAY 2013 10-Bit, 200-MSPS, 4-Channel and 12-Bit, 80-MSPS, 8-Channel Analog-to-Digital Converter Check for Samples: ADS5296 FEATURES DESCRIPTION • The ADS5296 is a low-power, 12-bit, 8-channel, analog-to-digital converter ADC with sample rates


    Original     		PDF ADS5296 SBAS606A 10-Bit, 200-MSPS, 12-Bit, 80-MSPS,

    chn 834

    Abstract: CHN 849
    Text: ADS5296 www.ti.com SBAS606A – MAY 2013 – REVISED MAY 2013 10-Bit, 200-MSPS, 4-Channel and 12-Bit, 80-MSPS, 8-Channel Analog-to-Digital Converter Check for Samples: ADS5296 FEATURES DESCRIPTION • The ADS5296 is a low-power, 12-bit, 8-channel, analog-to-digital converter ADC with sample rates


    Original     		PDF ADS5296 SBAS606A 10-Bit, 200-MSPS, 12-Bit, 80-MSPS, chn 834 CHN 849

    Virtex-II Board

    Abstract: LVCMOS15 vhdl code for flip-flop FG672 UG012
    Text: R Single-Ended SelectI/O Resources VHDL Template: - Module: SIGNED_MULT_18X18 - Description: VHDL instantiation template - 18-bit X 18-bit embedded signed multiplier asynchronous - Device: Virtex-II Pro Family - Components Declarations


    Original     		PDF 18X18 18-bit MULT18X18 MULT18X18 UG012 Virtex-II Board LVCMOS15 vhdl code for flip-flop FG672 UG012

    Untitled

    Abstract: No abstract text available
    Text: BCM8501 PRODUCT Brief STS-192c/STM-64c B C M 8 5 0 1 POS FRAMER S U M M A R Y F E AT U R E S 16-bit 622-Mbps LVDS line interface compliant with • SFI-4 64-bit 200MHz HSTL system interface compliant with • SPI-4/Phase1 16-bit generic microprocessor interface for device


    Original     		PDF BCM8501 STS-192c/STM-64c 16-bit 622-Mbps 64-bit 200MHz 612-pin mOC-192c/STM-64c BCM8501

    JESD79-2B

    Abstract: CR88 DDR2-667 STLS2E02 STLS2F01 STLS2F02 Loongson
    Text: STLS2F02 high performance 64-bit superscalar MIPS Loongson 2F microprocessor Preliminary Data Features • 64-bit superscalar architecture ■ 900 MHz clock frequency ■ Single/double precision floating-point units ■ New streaming multimedia instruction set


    Original     		PDF STLS2F02 64-bit DDR2-667 27x27 JESD79-2B CR88 STLS2E02 STLS2F01 STLS2F02 Loongson

    JESD79-2B

    Abstract: CR88 DDR2 Mechanical Dimensions DDR2-667 STLS2E02 STLS2F01 STLS2F02 axi crossbar
    Text: STLS2F02 high performance 64-bit superscalar MIPS Loongson 2F microprocessor Preliminary Data Features • 64-bit superscalar architecture ■ 900 MHz clock frequency ■ Single/double precision floating-point units ■ New streaming multimedia instruction set


    Original     		PDF STLS2F02 64-bit DDR2-667 27x27 JESD79-2B CR88 DDR2 Mechanical Dimensions STLS2E02 STLS2F01 STLS2F02 axi crossbar

    Loongson

    Abstract: axi crossbar DDR2-667 JESD97 STLS2E02 STLS2F01
    Text: STLS2F01 High performance 64-bit superscalar MIPS Loongson 2F: microprocessor Data Brief Features • 64-bit superscalar architecture ■ 900 MHz clock frequency ■ Single/double precision floating-point units ■ New streaming multimedia instruction set


    Original     		PDF STLS2F01 64-bit DDR2-667 27x27 Loongson axi crossbar JESD97 STLS2E02 STLS2F01

    JESD79-2B

    Abstract: DDR2 Mechanical Dimensions DDR2-667 STLS2E02 STLS2F01 Loongson
    Text: STLS2F01 High performance 64-bit superscalar MIPS Loongson 2F: microprocessor Preliminary Data Features • 64-bit superscalar architecture ■ 900 MHz clock frequency ■ Single/double precision floating-point units ■ New streaming multimedia instruction set


    Original     		PDF STLS2F01 64-bit DDR2-667 27x27 JESD79-2B DDR2 Mechanical Dimensions STLS2E02 STLS2F01 Loongson

    JESD79-2B

    Abstract: CR88 DDR2-667 STLS2E02 STLS2F01 1013tdi
    Text: STLS2F02-LP high performance 64-bit superscalar MIPS Loongson 2F microprocessor Preliminary Data Features • 64-bit superscalar architecture ■ 800 MHz clock frequency ■ Single/double precision floating-point units ■ New streaming multimedia instruction set


    Original     		PDF STLS2F02-LP 64-bit DDR2-667 27x27 JESD79-2B CR88 STLS2E02 STLS2F01 1013tdi

    JESD97

    Abstract: STLS2E02 35x35 bga Loongson
    Text: STLS2E02 Loongson 2E: 700MHz 64-bit superscalar MIPS based microprocessor Data Brief Features • 64 bit superscalar architecture ■ 700MHz clock frequency typical conditions ■ Single/double precision floating-point units ■ New Streaming Multimedia instruction set


    Original     		PDF STLS2E02 700MHz 64-bit 512KB DDR-333 700MHz 35x35 PBGA452 512KB JESD97 STLS2E02 35x35 bga Loongson

    JESD79-2B

    Abstract: 0x01000202 CR88 DDR2-667 STLS2E02 STLS2F01 Loongson
    Text: STLS2F02-LP high performance 64-bit superscalar MIPS Loongson 2F microprocessor Preliminary Data Features • 64-bit superscalar architecture ■ 800 MHz clock frequency ■ Single/double precision floating-point units ■ New streaming multimedia instruction set


    Original     		PDF STLS2F02-LP 64-bit DDR2-667 27x27 JESD79-2B 0x01000202 CR88 STLS2E02 STLS2F01 Loongson

    chn 648 equivalent

    Abstract: No abstract text available
    Text: Advisory April 1999 m ic ro e le c tro n ic s group Lucent Technologies Bell Labs Innovations TMPR28051 STS-1/AU-3 STM-0 Mapper Device Advisory for Version 2 of the Device Known TMPR28051 Version 2 Issues Issue 1: Reset Bit The software reset bit (bit 0) of register 0x00 is not functional.


    OCR Scan     		PDF TMPR28051 DS98-100TIC DS97-211TIC AY98-002TIC) chn 648 equivalent

    74612

    Abstract: Memory Mapper 16x8-bit TDVS-H CFT6121A
    Text: CFT6121A CFT6121A 74612 GENERAL DESCRIPTION: 4-TO 8-BIT MEMORY MAPPER CFT6121A is designed for paged memory mapping. It expands four address lines to eight address lines and contains a 16x8-bit RAM to story addresses. See the TI data book for a complete description.


    OCR Scan     		PDF CFT6121A CFT6121A 16x8-bit metal398 74612 Memory Mapper TDVS-H

    74612

    Abstract: 74610 CFT6120A
    Text: CFT6120A CFT6120A 74612 GENERAL D ESC R IPTIO N : 4-TO 12-BIT MEMORY MAPPER CFT6120A is designed for paged memory mapping. It expands four address lines to 12 address lines and contains a 16xl2-bit RAM to story addresses. The user can easily make it into a 74610 or 74612 as fol­


    OCR Scan     		PDF CFT6120A 12-BIT CFT6120A 16xl2-bit CFTG120A MON11 TI74610 TI74612 74612 74610