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    INTEGRATED DEVICE TECHNOLOGY 71V432

    Abstract: No abstract text available
    Text: 32K x 32 CacheRAM 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V432 processor interfaces. The pipelined burst architecture provides costeffective 3-1-1-1 secondary cache performance for processors up to


    Original     		PDF IDT71V432 IDT71V432 c/09/00 100pinTQFP x4033 INTEGRATED DEVICE TECHNOLOGY 71V432

    IDT71V432

    Abstract: No abstract text available
    Text: 32K x 32 CacheRAM™ 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V432 The IDT71V432 CacheRAM contains write, data, address, and control registers. Internal logic allows the CacheRAM to generate a self-timed write based upon a decision which can be left until the


    Original     		PDF IDT71V432 IDT71V432 71V432S7PF IDT71V432, x4033

    IDT71V432

    Abstract: No abstract text available
    Text: PRELIMINARY 32K x 32 CacheRAMIDT71V432 3.3V SYNCHRONOUS SRAM WITH BURST COUNTER, SINGLE CYCLE DESELECT Integrated Device Technology, Inc. FEATURES: • 32K x 32 memory configuration • Supports high performance system speed - 100 MHz 5ns Clock-to-Data Access in Pipelined Mode


    Original     		PDF IDT71V432 MT58LC32K32D7LG-XX) 100-pin IDT71V432 71V432 PK100-1) 71V432S5PF 71V432S6PF 71V432S7PF

    IDT71V432

    Abstract: MT58LC32K32D7LG-XX
    Text: 32K x 32 CacheRAM 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V432 processor interfaces. The pipelined burst architecture provides costeffective 3-1-1-1 secondary cache performance for processors up to


    Original     		PDF IDT71V432 IDT71V432 100pinTQFP MT58LC32K32D7LG-XX

    71V536

    Abstract: No abstract text available
    Text: PRELIMINARY 32K x 36 CacheRAMIDT71V536 3.3V SYNCHRONOUS BURST SRAM WITH PIPELINED OUTPUT Integrated Device Technology, Inc. FEATURES: • 32K x 36 memory configuration • Supports high performance system speed - 120 MHz 5.0ns Clock-to-Data Access . • LBO input selects interleaved or linear burst mode


    Original     		PDF IDT71V536 100-pin IDT71V536 648-bit 71V536 PK100-1) 71V536

    SRAM 6116

    Abstract: MP61 Intel-PENTIUM-PROCESSOR 82430NX NEPTUNE 7MPV6189 3058 7MPV6189
    Text:  256KB AND 512KB SECONDARY CACHE MODULES FOR THE INTEL PENTIUM PROCESSOR Integrated Device Technology, Inc. PRELIMINARY IDT7MPV6179 IDT7MPV6189 IDT7MP6181 IDT7MP6182 IDT7MPV6179/89 and IDT7MP6181/82 use asynchronous and burst CacheRAMs respectively in plastic surface mount


    Original     		PDF 256KB 512KB IDT7MPV6179 IDT7MPV6189 IDT7MP6181 IDT7MP6182 IDT7MPV6179/89 IDT7MP6181/82 IDT7MPV6189 IDT7MP6179 SRAM 6116 MP61 Intel-PENTIUM-PROCESSOR 82430NX NEPTUNE 7MPV6189 3058 7MPV6189

    Untitled

    Abstract: No abstract text available
    Text: 32K x 32 CacheRAM 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V432 processor interfaces. The pipelined burst architecture provides costeffective 3-1-1-1 secondary cache performance for processors up to


    Original     		PDF IDT71V432 100MHz) 83MHz) 66MHz) MT58LC32K32D7LG-XX) 100-pin 100pinTQFP

    M6SS

    Abstract: No abstract text available
    Text: bbE D INTEGRATE» DEVICE M6SS771 G01E37T Ti|b • IDT CMOS CacheRAM 32k x 9-BIT 288K-BIT BURST COUNTER & SELF-TIMED WRITE IDT71589SA FEATURES: DESCRIPTION: • • • • • • • The IDT71589 is a very high-speed 32k x 9-bit static RAM with full on-chip hardware support of the 80486 CPU interface.


    OCR Scan     		PDF M6SS771 G01E37T 288K-BIT) IDT71589SA IDT71589 M6SS

    79R3000

    Abstract: No abstract text available
    Text: Bicameral CacheRAM” 288K 16K x 9 x 2 FOR RISC CACHES PRELIMINARY IDT71B229S FEATURES: DESCRIPTION: • Supports the R3000 and R3001 to 40MHz • Bicam eral organization: — Split instruction/data cache support — No bank-switching timing contention


    OCR Scan     		PDF IDT71B229S R3000 R3001 40MHz 32-pin 300mil IDT71B229 IDT79R3000 128KB 79R3000

    71586

    Abstract: 71586S25 ic cmos 4039 TCL 2990 82A306 IDT71586
    Text: CMOS STATIC RAM 64K 4Kx 16-BIT LATCHED CacheRAM IDT71586 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • W ide 4K x 16 Organization • High-speed access — Com mercial: 25 /3 5 /4 5 n s (m ax.) — Military: 3 5 /45/5 5n s (m ax.) • Internal fast 12-bit address latch (5ns set-up and hold


    OCR Scan     		PDF 16-BIT) IDT71586 12-bit 40-pin, 44-pin IDT71586 MIL-STD-883, 71586 71586S25 ic cmos 4039 TCL 2990 82A306

    idt 71589

    Abstract: IDT71589
    Text: CMOS CacheRAM 32K x 9-BIT 288K-BIT BURST COUNTER & SELF-TIMED WRITE IDT71589SA Integ rated D evice T echnology, Inc. FEATURES: DESCRIPTION: • • • • • • • T h e ID T 7 1589 is a very high -spe ed 32K x 9-bit static RAM w ith full on-chip ha rdw are support of the 80486 CPU interface.


    OCR Scan     		PDF 288K-BIT) IDT71589SA 32-pin 128KB P6086) 256KB P6087 idt 71589 IDT71589

    Untitled

    Abstract: No abstract text available
    Text: bflE D • MÔES771 0014SDM 7T7 ■ IDT 128K/256K BYTE CMOS IDT7MP6085 SECONDARY CACHE MODULE IDT7MP6087 FOR THE INTEL i486™ _ I N T E G R A T E D D E VI CE FEATURES: • 128K /256K byte pin-compatible secondary cache modules • Uses the ID T 7 1589 32K x 9 CacheRAM™ with burst counter


    OCR Scan     		PDF ES771 0014SDM 128K/256K IDT7MP6085 IDT7MP6087 i486TM /256K i486TM T71589s IDT7MP6085/

    71V536

    Abstract: No abstract text available
    Text: PRELIMINARY 32K X 36 CacheRAM IDT71V536 3.3V SYNCHRONOUS BURST SRAM WITH PIPELINED OUTPUT I n t e g r a t e d D e v iz e T e c h n o lo g y , l i e . FEATURES: • • • • • • • 32K x 36 m em ory configuration Supports high perform ance system speed -1 2 0 MHz


    OCR Scan     		PDF IDT71V536 100-pin 492-M 71V536

    s0321

    Abstract: l130v
    Text: CMOS CacheRAM 32K X 9-BIT 288K-BIT BURST COUNTER & SELF-TIMED WRITE ADVANCE INFORMATION IDT71589 FEATURES: DESCRIPTION: • • • • T h e ID T 7 1 589 is an extrem ely high-speed 32K x 9-bit static RAM with full on-chip hardware support of the Intel ¡486 CPU


    OCR Scan     		PDF 288K-BIT) 486TM 32-pin IDT71589 29S1W MIL-STD-883, s0321 l130v

    intel i486

    Abstract: No abstract text available
    Text: gPN 128K/256K BYTE CMOS SECONDARY CACHE MODULE FOR THE INTEL i486™ Idt IDT7MP6085 IDT7MP6087 In te g ra te d Dev Ice T echnology, Inc. FEATURES: • 128K/256K byte pin-compatible secondary cache modules • Uses the IDT71589 32K x 9 CacheRAM™ with burst counter


    OCR Scan     		PDF 128K/256K i486TM IDT7MP6085 IDT7MP6087 IDT71589 i486TM IDT7MP6085/7MP6087 128KB intel i486

    IDT71586

    Abstract: No abstract text available
    Text: CMOS STATIC RAM 6 4 K 4 K x 16-BIT LATCHED CacheRAM IDT 71586 FEATURES: DESCRIPTION: • Wide 4K x 16 Organization The IDT71586 is a fast 4K x 16 latched address CMOS static RAM designed to enhance cache memory designs. This device of­ fers improved circuit board densities overdesigns using traditional


    OCR Scan     		PDF 16-BIT) IDT71586 82C307, IDT79R3000 MIL-STD-883,

    Untitled

    Abstract: No abstract text available
    Text: ADVANCE INFORMATION IDT71B229 Bicameral CacheRAM™ 256K-BIT 16K X 9 X 2 FOR RISC CACHES FEATURES: DESCRIPTION: • High speed supports fastest R 3 0 0 0 CPUs: — 15, 22, 28ns — Supports 33, 25 and 20 M H z • B icam eral organization: — Split instruction/data cache support,


    OCR Scan     		PDF IDT71B229 256K-BIT 128K-B 32-pln 128KByte IDT71Bead

    Untitled

    Abstract: No abstract text available
    Text: :¡0SSss» dt) I n te g r a te d D 32K x 32 CacheRAM PRELIMINARY 3.3V SYNCHRONOUS SRAM WITH IDT71V432 BURST COUNTER, SINGLE CYCLE DESELECT / iz e T e c h n o lo g y , l i e . FEATURES: • 32K x 32 m em ory configuration • Supports high perform ance system speed -1 0 0 MHz


    OCR Scan     		PDF IDT71V432 T58LC 32K32D 100-pin 2S771

    intel i486

    Abstract: No abstract text available
    Text: I N T E G R A T E D D E VI CE 47E D m 4 3 2 5 7 7 1 □Q10S3fe. fi B H I D T 128K BYTE CMOS SECONDARY CACHE MODULE FOR THE INTEL i486™ 1DT7MP6086 Integrated Device Technology, Inc. FEATURES: • 128K byte direct mapped secondary cache module • Uses the ID T71589 32K x 9 CacheRAM™ with burst


    OCR Scan     		PDF Q10S3fe. i486TM 1DT7MP6086 T71589 intel i486

    Untitled

    Abstract: No abstract text available
    Text: dt) I n te g r a te d D 32K x 32 CacheRAM PRELIMINARY 3.3V SYNCHRONOUS SRAM WITH IDT71V432 BURST COUNTER, SINGLE CYCLE DESELECT / iz e T e c h n o lo g y , I n c . FEATURES: • 32K x 32 m em ory configuration • Supports high perform ance system speed - 83 MHz


    OCR Scan     		PDF IDT71V432 PSC-4045 2S771

    Untitled

    Abstract: No abstract text available
    Text: Integrated Device Technology, Inc. 32K x 18 CacheRAM BURST COUNTER & SELF-TIMED WRITE — FOR THE PENTIUM" PROCESSOR PRELIMINARY IDT71420 FEATURES: DESCRIPTION: • • • • Th e ID T 7 1420 is a high-speed 3 2K x 18-bit static RAM with full on-chip hardware support of the Pentium processor inter­


    OCR Scan     		PDF IDT71420 52-pin 18-bit 52-pin J52-1)

    IDT71420

    Abstract: No abstract text available
    Text: Integrated D evice T ech nology, Inc. 32K x 18 CacheRAM BURST COUNTER & SELF-TIMED WRITE — FOR THE PENTIUM” PROCESSOR PRELIMINARY IDT71420 FEATURES: DESCRIPTION: • • • • The IDT71420 is a high-speed 32K x 18-bit static RAM with full on-chip hardware support of the Pentium processor inter­


    OCR Scan     		PDF IDT71420 52-pin IDT71420 18-bit 52-pin J52-1)

    Untitled

    Abstract: No abstract text available
    Text: 32K X 32 CacheRAM PRELIMINARY IDT71V432 3.3V SYNCHRONOUS SRAM WITH INTERLEAVED/LINEAR BURST COUNTER FEATURES: • 3 2 K x 32 m e m o ry c o n fig u ra tio n • S u p p o rts high p e rfo rm a n c e system sp e e d - 66 M H z 7 ns C lo c k -to -D a ta A c c e s s in P ipeline d M ode


    OCR Scan     		PDF IDT71V432 71V432 PK100-1)

    idt71586

    Abstract: intel 80386 SL intel 80386 pin diagram cacheram 82c307 cache controller IDT71586S25 chip and technology 82c307 82C30
    Text: CMOS STATIC RAM 64K 4Kx 16-BIT LATCHED CacheRAM’ IDT 71586 FEATURES: DESCRIPTION: • W ide 4K x 16 O rg a n iza tio n • H ig h -spe e d a ccess - C o m m e rcial: 24/3 5/45 /5 5 n s (max.) - M ilitary: 3 5/4 5/55 n s (max.) • Internal fast 12-blt a dd re ss latch (5ns se t-u p & h o ld tim es)


    OCR Scan     		PDF 16-BIT) 12-blt T79R3000 715ess. MIL-STD-883, S4-254 idt71586 intel 80386 SL intel 80386 pin diagram cacheram 82c307 cache controller IDT71586S25 chip and technology 82c307 82C30