Untitled
Abstract: No abstract text available
Text: ComLink Series CY2DP3110 PRELIMINARY 1 of 2:10 Differential Fanout Buffer Features Description • Ten ECL/PECL differential outputs • Two ECL/PECL and HSTL differential or LVCMOS/LVTTL single-ended inputs • Hot-swappable/-insertable • 35-ps output-to-output skew typical
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Original
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PDF
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CY2DP3110
35-ps
100-ps
10-pS
400-ps
32-pin
MC100
CY2DP3110
|
Untitled
Abstract: No abstract text available
Text: FastEdge Series CY2DP3110 1 of 2:10 Differential Fanout Buffer Features Description • Ten ECL/PECL differential outputs • Two ECL/PECL and HSTL differential or single-ended inputs • Hot-swappable/-insertable • 35-ps output-to-output skew typical
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Original
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PDF
|
CY2DP3110
35-ps
100-ps
400-ps
32-pin
MC100
CY2DP3110
|
Untitled
Abstract: No abstract text available
Text: FastEdge Series CY2DP3110 1 of 2:10 Differential Fanout Buffer Features Description • Ten ECL/PECL differential outputs • Two ECL/PECL and HSTL differential or single-ended inputs • Hot-swappable/-insertable • 35-ps output-to-output skew typical
|
Original
|
PDF
|
CY2DP3110
35-ps
100-ps
400-ps
32-pin
MC100
CY2DP3110
|
CY2DP3110
Abstract: CY2DP3110AI CY2DP3110AIT CY2DP3110AXIT MC100ES6111
Text: FastEdge Series CY2DP3110 1 of 2:10 Differential Clock/Data Fanout Buffer Features Functional Description • Ten ECL/PECL differential outputs • One ECL/PECL differential or single-ended inputs CLKA • One HSTL differential or single-ended inputs (CLKB)
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Original
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PDF
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CY2DP3110
32-pin
CY2DP3110
CY2DP3110AI
CY2DP3110AIT
CY2DP3110AXIT
MC100ES6111
|
CY2DP3110
Abstract: CY2DP3110AI CY2DP3110AIT MC100ES6111
Text: FastEdge Series CY2DP3110 1 of 2:10 Differential Clock/Data Fanout Buffer Features Functional Description • Ten ECL/PECL differential outputs • One ECL/PECL differential or single-ended inputs CLKA • One HSTL differential or single-ended inputs (CLKB)
|
Original
|
PDF
|
CY2DP3110
32-pin
CY2DP3110
CY2DP3110AI
CY2DP3110AIT
MC100ES6111
|
Untitled
Abstract: No abstract text available
Text: FastEdge Series CY2DP3110 PRELIMINARY 1 of 2:10 Differential Fanout Buffer Features Description • Ten ECL/PECL differential outputs • Two ECL/PECL and HSTL differential or single-ended inputs • Hot-swappable/-insertable • 35-ps output-to-output skew typical
|
Original
|
PDF
|
CY2DP3110
35-ps
100-ps
10-pS
400-ps
32-pin
MC100
CY2DP3110
|
Untitled
Abstract: No abstract text available
Text: FastEdge Series CY2DP3110 1 of 2:10 Differential Fanout Buffer Features Description • Ten ECL/PECL differential outputs • Two ECL/PECL and HSTL differential or single-ended inputs • Hot-swappable/-insertable • 35-ps output-to-output skew typical
|
Original
|
PDF
|
CY2DP3110
35-ps
100-ps
400-ps
32-pin
MC100
CY2DP3110
|
