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    CY2PP3220AIT Datasheets (1)

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    CY2PP3220AIT Cypress Semiconductor Dual 1:10 Differential Clock / Data Fanout Buffer Original PDF

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    CY2PP3220

    Abstract: CY2PP3220AI CY2PP3220AIT
    Text: FastEdge Series CY2PP3220 PRELIMINARY Dual 1:10 Differential Fanout Buffer Features • • • • • • • • • • • • • Description Two sets of ten ECL/PECL differential outputs Two ECL-/PECL-differential inputs Hot-swappable/-insertable


    Original     		CY2PP3220 50-ps 500-ps 10-ps 52-pin CY2PP3220 1-to-10 CY2PP3220AI CY2PP3220AIT PDF

    CY2PP3220

    Abstract: CY2PP3220AI CY2PP3220AIT MC100ES6220
    Text: FastEdge Series CY2PP3220 Dual 1:10 Differential Clock/Data Fanout Buffer Features Functional Description • Two sets of ten ECL/PECL differential outputs • Two ECL/PECL differential inputs • Hot-swappable/-insertable • 50 ps output-to-output skew


    Original     		CY2PP3220 52-pin CY2PP3220 1-to-10 CY2PP3220AI CY2PP3220AIT MC100ES6220 PDF

    CY2PP3220

    Abstract: CY2PP3220AI CY2PP3220AIT MC100ES6220
    Text: FastEdge Series CY2PP3220 Dual 1:10 Differential Clock/Data Fanout Buffer Features Functional Description • Two sets of ten ECL/PECL differential outputs • Two ECL/PECL differential inputs • Hot-swappable/-insertable • 50 ps output-to-output skew


    Original     		CY2PP3220 52-pin CY2PP3220 1-to-10 CY2PP3220AI CY2PP3220AIT MC100ES6220 PDF