Untitled
Abstract: No abstract text available
Text: Advance Data Sheet August 1998 LU5M31 Gigabit Ethernet Media Access Controller MAC Overview The LU5M31 is a single-port 1 Gbit/s MAC that incorporates physical coding sublayer (PCS) functionality. The LU5M31 is intended to enhance 10/ 100 Mbits/s Ethernet frame switching, multiple port
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LU5M31
LU5M31
8b/10b
DS98-351LAN
DS97-447LAN)
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clause 22 phy registers
Abstract: 13007 h3 ali 3602 detail of D 13007 K mca exam date sheet 1000BASE-X DS1005 STS-48
Text: LatticeSC/M Family flexiPCS Data Sheet DS1005 Version 01.9, December 2008 LatticeSC/M Family flexiPCS Data Sheet Table of Contents December 2008 Introduction to flexiPCS .1-1
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DS1005
clause 22 phy registers
13007 h3
ali 3602
detail of D 13007 K
mca exam date sheet
1000BASE-X
STS-48
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SMD45
Abstract: SMD34 224 d5 smd zd 15 p240f1 SMD52 SMD46 SMD-42 smd M16 SMD23
Text: お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジ が合併し両社の全ての事業が当社に承継されております。従いまして、本資料中には旧社
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PD98421
PD98421
MHz50
S13650JJ6V0DS
P240F1-80-GA5
SMD45
SMD34
224 d5
smd zd 15
p240f1
SMD52
SMD46
SMD-42
smd M16
SMD23
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Untitled
Abstract: No abstract text available
Text: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid
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SMD phase shifter 0201
Abstract: ts201S ADSP-TS201SABP-050 ADSP-TS201SABP-060 l3bc
Text: TigerSHARC Embedded Processor ADSP-TS201S • a KEY FEATURES KEY BENEFITS Up to 600 MHz, 1.67 ns instruction cycle rate 24M bits of internal—on-chip—DRAM memory 25 mm x 25 mm 576-ball thermally enhanced ball grid array package Dual-computation blocks—each containing an ALU, a
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576-ball)
14-channel
32-bit
40-bit
64-bit
BP-576
576-Ball
SMD phase shifter 0201
ts201S
ADSP-TS201SABP-050
ADSP-TS201SABP-060
l3bc
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Supersparc
Abstract: IEEE754 STP1021A
Text: STP1021A July 1997 SuperSPARC -II DATA SHEET SPARC v8 32-Bit Superscalar Microprocessor DESCRIPTION The STP1021A is a new member of the SuperSPARC-II family of microprocessor products. Like its predecessors STP1020N, STP1020 and STP1021 this new part is fully SPARC Version 8 compliant and is completely upward compatible with the earlier SPARC Version 7 implementations running over 9,400 SPARC applications and development
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STP1021A
32-Bit
STP1021A
STP1020N,
STP1020
STP1021)
instructionta32
addr18
data50
Supersparc
IEEE754
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mpc560xb bolero
Abstract: MPC5606B CHN 949 transistor BC 247 LINFlex PROTOCOL linflex MPC560xB "Base Station subsystem 30f131 pj 989
Text: Devices Supported: MPC5607B MPC5607BRM Rev. 5 31 Jan 2010 MPC5607B Microcontroller Reference Manual, Rev. 5 Freescale Semiconductor Preliminary—Subject to Change Without Notice 1 Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available
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MPC5607B
MPC560xB
MPC5607BRM
MPC5607B
mpc560xb bolero
MPC5606B
CHN 949
transistor BC 247
LINFlex PROTOCOL
linflex
"Base Station subsystem
30f131
pj 989
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HIQUAD64
Abstract: L9803 AM-113 410lsb HIQUAD64 ST st driver regulator automotive HiQUAD-64 HiQUAD-64 st TEC H bridge AD10 IS09141
Text: L9803 Super smart power motor driver with 8-Bit MCU, RAM, EEPROM, ADC, WDG, Timers, PWM and H-bridge driver Features • 6.4-18V Supply Operating Range ■ 16 MHz Maximum Oscillator Frequency ■ 8 MHz Maximum Internal Clock Frequency ■ Oscillator Supervisor
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L9803
HiQUAD64
16-bit
L9803
AM-113
410lsb
HIQUAD64 ST
st driver regulator automotive HiQUAD-64
HiQUAD-64 st
TEC H bridge
AD10
IS09141
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IS09141
Abstract: d.331 transistor L9805 st driver regulator automotive HiQUAD-64 SPLIT MOTOR HiQuad SGFH LA AD10 PCB VK 557 diode 351
Text: L9805 Super Smart Power Motor Driver with 8-BIT MCU, CAN Interface, 16K EPROM, 256Bytes RAM, 128 Bytes EEPROM, 10 Bit ADC, WDG, 2 Timers, 2 PWM Modules, Full H-Bridge Driver PROUCT PREVIEW • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
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L9805
256Bytes
HiQUAD64
16-bit
IS09141
d.331 transistor
L9805
st driver regulator automotive HiQUAD-64
SPLIT MOTOR
HiQuad
SGFH LA
AD10
PCB VK 557
diode 351
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TDSR 5130
Abstract: TDSR 5130 H TDSR 5130 g TDSR SQFP208 SAA6750H SAA7111 SAA7146 iso 13818-2 SAA711x
Text: INTEGRATED CIRCUITS DATA SHEET SAA6750H Encoder for MPEG2 image recording EMPIRE Preliminary specification File under Integrated Circuits, IC02 1998 Sep 07 Philips Semiconductors Preliminary specification Encoder for MPEG2 image recording (EMPIRE) SAA6750H
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SAA6750H
SCA60
545104/750/01/pp64
TDSR 5130
TDSR 5130 H
TDSR 5130 g
TDSR
SQFP208
SAA6750H
SAA7111
SAA7146
iso 13818-2
SAA711x
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clause 22 phy registers
Abstract: No abstract text available
Text: LatticeSC Family flexiPCS Data Sheet DS1005 Version 01.2, June 2006 LatticeSC flexiPCS Data Sheet Table of Contents June 2006 Introduction to flexiPCS .1-1
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DS1005
VCC12.
clause 22 phy registers
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EE-68
Abstract: ts201 Embedded Processor Preliminary Data Sheet link port ts201 32X32 ADSP-TS201S l3bc ADSP-TS201SABP-6X ADSP-TS201SABP-X
Text: TigerSHARC Embedded Processor ADSP-TS201S Preliminary Technical Data KEY FEATURES KEY BENEFITS Up to 600 MHz, 1.67 ns Instruction Cycle Rate 24M Bits of Internal—On-Chip—DRAM Memory 25x25 mm 576-Ball Thermally Enhanced Ball Grid Array Package Dual Computation Blocks—Each Containing an ALU, a Multiplier, a Shifter, a Register File, and a Communications Logic
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ADSP-TS201S
576-Ball)
24Mbit
BP-576
ADSP-TS201SABP-X
C00000-0-03/03
BP-576)
EE-68
ts201 Embedded Processor Preliminary Data Sheet
link port ts201
32X32
ADSP-TS201S
l3bc
ADSP-TS201SABP-6X
ADSP-TS201SABP-X
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electronic watchdog using ic1 ne555
Abstract: TQFP80 footprint dimensions of ic2 ne555 ic1 ne555 infrared transmitter for pir 325 ST72521B ST72F521 TQFP64 TQFP80 JRC 2100 8 pin
Text: ST72F521, ST72521B 80/64-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE • ■ ■ ■ ■ Memories – 32K to 60K dual voltage High Density Flash HDFlash or ROM with read-out protection capability. In-Application Programming and
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ST72F521,
ST72521B
80/64-PIN
electronic watchdog using ic1 ne555
TQFP80 footprint dimensions
of ic2 ne555
ic1 ne555
infrared transmitter for pir 325
ST72521B
ST72F521
TQFP64
TQFP80
JRC 2100 8 pin
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PCR 406 J
Abstract: MPC5605 MPC5606B MPC5605B PCR 606 J MPC5607BRM transistor pcr 606 j MPC5607B APC UPS CIRCUIT DIAGRAM 7M 0880 IC pin ,j10
Text: MPC5607B Microcontroller Reference Manual Devices Supported: MPC5607B MPC5606B MPC5605B MPC5607BRM Rev. 6 30 Jun 2010 MPC5607B Microcontroller Reference Manual, Rev. 6 Freescale Semiconductor 1 Preliminary—Subject to Change Without Notice Chapter 1 Overview
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MPC5607B
MPC5607B
MPC5606B
MPC5605B
MPC5607BRM
PCR 406 J
MPC5605
MPC5606B
MPC5605B
PCR 606 J
MPC5607BRM
transistor pcr 606 j
APC UPS CIRCUIT DIAGRAM
7M 0880 IC pin ,j10
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MI-MV13
Abstract: M4T11 cmos 3.1 megapixel 18 pin image sensor V7514 "Micron Technology" cmos c16
Text: 1.3-MEGAPIXEL CMOS ACTIVE-PIXEL DIGITAL IMAGE SENSOR 1.3-MEGAPIXEL CMOS ACTIVE-PIXEL DIGITAL IMAGE SENSOR MT9M413 Micron Part Number: MT9M413C36STC Description The MI-MV13 is a 1,280H x 1,024V 1.3 megapixel CMOS digital image sensor capable of 500 frames-persecond (fps) operation. Its TrueSNAP electronic
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MI-MV13
10-bit
10-bit-wide
09005aef806807ca
MT9M413C36STC
M4T11
cmos 3.1 megapixel 18 pin image sensor
V7514
"Micron Technology" cmos c16
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PB-MV40
Abstract: Photobit MV40 D100 D109 D110 D119 D120 D129 D130
Text: PB-MV40 4 Megapixel CMOS Active-Pixel Digital Image Sensor 2001 Photobit Technology Corporation. All rights reserved. Photobit Technology Corporation is a wholly owned subsidiary of Photobit Corporation. Photobit, the wave and binary symbol, Behind Every Great Digital Image, and TrueBit are registered trademarks-and TrueColor, TrueSNAP Shuttered-Node
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PB-MV40
prod05
D-263
PB-MV40
Photobit
MV40
D100
D109
D110
D119
D120
D129
D130
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GHW Connectors
Abstract: TDQ38 BTA60 bta61 bta80 bta11 BTA100 BTA32 bta50 bta81
Text: Version 1.2 December 1999 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 492-8674 Printed in U.S.A. 1999 Integrated Device Technology, Inc. Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance
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Untitled
Abstract: No abstract text available
Text: L9803 Super smart power motor driver with 8-Bit MCU, RAM, EEPROM, ADC, WDG, Timers, PWM and H-bridge driver Features • 6.4-18V Supply Operating Range ■ 16 MHz Maximum Oscillator Frequency ■ 8 MHz Maximum Internal Clock Frequency ■ Oscillator Supervisor
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L9803
HiQUAD64
16-bit
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bosch me 7.3.1 0 261 207 609 pinout
Abstract: mpc5604 bosch me 7.3.1 0 261 207 609 pinout diagram MPC560XPRM mlk 1899 mpc5604p MS146 manual temperature controller CHB 702 MPC560xP bosch ecu 0 261 200 218 connection diagram
Text: MPC5604P Microcontroller Reference Manual Devices Supported: MPC5602P MPC5603P MPC5604P MPC560XPRM Rev. 3 12 Feb 2010 MPC5604P Microcontroller Reference Manual, Rev. 3 Freescale Semiconductor 1 MPC5604P Microcontroller Reference Manual, Rev. 3 2 Freescale Semiconductor
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MPC5604P
MPC5602P
MPC5603P
MPC5604P
MPC560XPRM
bosch me 7.3.1 0 261 207 609 pinout
mpc5604
bosch me 7.3.1 0 261 207 609 pinout diagram
MPC560XPRM
mlk 1899
MS146
manual temperature controller CHB 702
MPC560xP
bosch ecu 0 261 200 218 connection diagram
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MPC5604B
Abstract: PCR 406 J 10523 SDC 339 Bosch 30428 bosch me 7.3.1 0 261 207 609 pinout bosch edc 17 MPC5604BCRM 30541 bosch me 7.3.1 MPC5603
Text: MPC5604B/C Microcontroller Reference Manual Devices Supported: MPC5602B MPC5602C MPC5603B MPC5603C MPC5604B MPC5604C MPC5604BCRM Rev. 7 23 Jul 2010 MPC5604B/C Microcontroller Reference Manual, Rev. 7 Freescale Semiconductor 1 MPC5604B/C Microcontroller Reference Manual, Rev. 7
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MPC5604B/C
MPC5602B
MPC5602C
MPC5603B
MPC5603C
MPC5604B
MPC5604C
MPC5604BCRM
MPC5604B
PCR 406 J
10523 SDC 339
Bosch 30428
bosch me 7.3.1 0 261 207 609 pinout
bosch edc 17
MPC5604BCRM
30541
bosch me 7.3.1
MPC5603
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SuperSPARC
Abstract: Mbus master 250 slave circuit tmx390 STP1091-60
Text: S un M icroelectronics July 1997 Multi-Cache Controller DATA SHEET Integrated Cache Controller for SuperSPARC D e s c r ip t io n The STP1091 is a high-performance external cache controller for the STP1020 SuperSPARC and STP1021 (SuperSPARC-II) microprocessors. It is used when a large secondary cache or an interface to a non-MBus sys
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STP1091
STP1020
STP1021
33x8k
STP1091PGA-75
STP1091PGA-90
STP1020HS
STP1091
SuperSPARC
Mbus master 250 slave circuit
tmx390
STP1091-60
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Untitled
Abstract: No abstract text available
Text: SONY PRELIMINARY SCM603256A5 Cache Module for PowerPC 603e CPU PowerPC 603e 256KB Secondary Cache Description The SCM603256A5 module belongs to a set of sec ondary caches intended for use with PowerPC 603e based systems. The SCM603256A5 uses two of Sony’s 1M 32Kx32
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SCM603256A5
256KB
603eTM
SCM603256A5
32Kx32
ISB31
SCM603256A4
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supersparc
Abstract: HY 1021A Sun STP1021 3AR3 cap 220 htz ADA33
Text: [ f ^ T l r í A C K j S un M i c r o e l e c t r o n i c s July 1997 SuperSPARC“-ll DATA SHEET SPARC v8 32-Bit Superscalar Microprocessor D e s c r ip t io n The STP1021A is a new m em ber of the Su p erSPA R C T I fam ily o f m icroprocessor products. L ik e its predeces
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STP1021A
STP1020N,
STP1020
STP1021)
cl277
data12
STP1021APGA-85
STP1021APGA-75
supersparc
HY 1021A
Sun STP1021
3AR3
cap 220 htz
ADA33
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Untitled
Abstract: No abstract text available
Text: STP1091 S un M ic r o e l e c t r o n ic s J u ly 1997 Multi-Cache Controller DATA SHEET Integrated Cache Controller for SuperSPARC D e s c r ip t io n The STP1091 is a high-perform ance external cache controller for the STP1020 SuperSPARC and STP1021
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STP1091
STP1091
STP1020
STP1021
33x8k
1091PG
STP1020H
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