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    DRAM DC CURRENT DEFINITION Search Results

    DRAM DC CURRENT DEFINITION Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TLX9188 Toshiba Electronic Devices & Storage Corporation Photocoupler (phototransistor output), DC input, 3750 Vrms, SO6, Automotive Visit Toshiba Electronic Devices & Storage Corporation
    TPD4207F Toshiba Electronic Devices & Storage Corporation Intelligent power device 600V (High voltage PWM DC brushless motor driver) Visit Toshiba Electronic Devices & Storage Corporation
    TPD4204F Toshiba Electronic Devices & Storage Corporation Intelligent power device 600V (High voltage PWM DC brushless motor driver) Visit Toshiba Electronic Devices & Storage Corporation
    TLP294-4 Toshiba Electronic Devices & Storage Corporation Photocoupler (phototransistor output), AC input, 3750 Vrms, 4 channel, SO16 Visit Toshiba Electronic Devices & Storage Corporation
    TLP295-4 Toshiba Electronic Devices & Storage Corporation Photocoupler (phototransistor output), DC input, 3750 Vrms, 4 channel, SO16 Visit Toshiba Electronic Devices & Storage Corporation

    DRAM DC CURRENT DEFINITION Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    UL435

    Abstract: CISP11
    Text: Smart I/O Card Product Definition CompactPCI Smart I/O64 Card Product Definition Revision 0.04 9/02/98 Approvals Author: _ Date: _ This document contains proprietary information. In addition, the software and hardware


    Original     		I/O64 64-bit M66EN UL435 CISP11 PDF

    Untitled

    Abstract: No abstract text available
    Text: NT1GT72B89D2BD / NT2GT72B8PD2BD NT1GT72B89D2BE / NT2GT72B8PD2BE 1GB: 128Mx72 / 2GB: 256Mx72 Draft 240pin DDR2 SDRAM Fully Buffered DIMM Based on 128Mx8 DDR2 SDRAM Features • 1GB 128Mx72 and 2GB 256Mx72 DDR2 Fully Buffered DIMM based on 128Mx8 DDR2 SDRAM NT5TU256M4BJ-37A/3B .


    Original     		NT1GT72B89D2BD NT2GT72B8PD2BD NT1GT72B89D2BE NT2GT72B8PD2BE 128Mx72 256Mx72 240pin 128Mx8 256Mx72 PDF

    TMS 3455

    Abstract: FC540 A7WE A04E Integral pc2-5300 DDR2 FC530-B
    Text: 240pin DDR2 MetaSDRAM Registered DIMM based on 1Gb version C This Hynix 8GB DDR2 MetaSDRAM Registered DIMM contains standard Hynix C-version 1Gb DDR2 SDRAMs in Fine Ball Grid Array FBGA packages on a 240pin glass-epoxy substrate. The module is capable of operating at PC2-4200(DDR2-533) data rate.


    Original     		240pin PC2-4200 DDR2-533) 1Gx72 HYMP31GP72CMP4 FC540 55max 1240pin TMS 3455 FC540 A7WE A04E Integral pc2-5300 DDR2 FC530-B PDF

    Ntc bd-7

    Abstract: No abstract text available
    Text: NT5TU256M4GE / NT5TU128M8GE / NT5TU64M16GG 1Gb DDR2 SDRAM Feature CAS Latency Frequency -3C/3CI -AC/ACI/ACL -BE -BD DDR2-667-CL5 (DDR2-800-CL5) (DDR2-1066-CL7) (DDR2-1066-CL6) Speed Bins Units Parameter


    Original     		NT5TU256M4GE NT5TU128M8GE NT5TU64M16GG DDR2-667-CL5) DDR2-800-CL5) DDR2-1066-CL7) DDR2-1066-CL6) Ntc bd-7 PDF

    DDR2 SDRAM DIMM

    Abstract: PC2-5300 PC2-6400 SSTL-18 NT1GT72U89D0BD NT2GT72U8PD1BD
    Text: NT1GT72U89D0BD / NT2GT72U8PD0BD NT1GT72U89D1BD / NT2GT72U8PD1BD NT1GT72U89D1BN / NT2GT72U8PD1BN 1GB: 128Mx72 / 2GB: 256Mx72 Preliminary Edition 240pin DDR2 SDRAM Fully Buffered DIMM Based on 128Mx8 DDR2 SDRAM Features • 1GB 128Mx72 and 2GB 256Mx72 DDR2 Fully Buffered DIMM


    Original     		NT1GT72U89D0BD NT2GT72U8PD0BD NT1GT72U89D1BD NT2GT72U8PD1BD NT1GT72U89D1BN NT2GT72U8PD1BN 128Mx72 256Mx72 240pin 128Mx8 DDR2 SDRAM DIMM PC2-5300 PC2-6400 SSTL-18 NT2GT72U8PD1BD PDF

    Untitled

    Abstract: No abstract text available
    Text: NT5TU64M8DE / NT5TU32M16DG 512Mb DDR2 SDRAM Feature CAS Latency Frequency -3C/3CI -AC/ACI -BE -BD DDR2-667-CL5 (DDR2-800-CL5) (DDR2-1066-CL7) (DDR2-1066-CL6) Speed Bins Units Parameter Min. Max. Min. Max. Min. Max. Min. Max. tCK(Avg.) Clock Frequency 125


    Original     		NT5TU64M8DE NT5TU32M16DG 512Mb DDR2-667-CL5) DDR2-800-CL5) DDR2-1066-CL7) DDR2-1066-CL6) PDF

    NT5TU32M16DG

    Abstract: NT5TU32M16 Nanya NT5TU32M16DG RU 3C
    Text: NT5TU64M8DE / NT5TU32M16DG 512Mb DDR2 SDRAM Feature CAS Latency Frequency -3C/3CI* -AC/ACI* -BE* -BD* DDR2-667-CL5 (DDR2-800-CL5) (DDR2-1066-CL7) (DDR2-1066-CL6) Speed Bins Units Parameter Min. Max. Min. Max. Min. Max. Min. Max. tCK(Avg.) Clock Frequency


    Original     		NT5TU64M8DE NT5TU32M16DG 512Mb DDR2-667-CL5) DDR2-800-CL5) DDR2-1066-CL7) DDR2-1066-CL6) NT5TU32M16DG NT5TU32M16 Nanya NT5TU32M16DG RU 3C PDF

    NT5TU128M8GE

    Abstract: No abstract text available
    Text: NT5TU128M8GE / NT5TU64M16GG 1Gb DDR2 SDRAM Feature CAS Latency Frequency Speed Bins -3C/3CI -AC/ACI/ACL -BE -BD DDR2-667-CL5 (DDR2-800-CL5) (DDR2-1066-CL7) (DDR2-1066-CL6) Units Parameter Min. Max. Min. Max. Min. Max. Min. Max. tCK(Avg.) Clock Frequency


    Original     		NT5TU128M8GE NT5TU64M16GG DDR2-667-CL5) DDR2-800-CL5) DDR2-1066-CL7) DDR2-1066-CL6) PDF

    Untitled

    Abstract: No abstract text available
    Text: NT5TU256M4GE / NT5TU128M8GE / NT5TU64M16GG 1Gb DDR2 SDRAM Feature CAS Latency Frequency -3C/-3CI -AC/-ACI -BD DDR2-667-CL5 (DDR2-800-CL5) (DDR2-1066-CL6) Speed Bins Units Parameter min max min max min max tCK(Avg.) Clock Frequency 125 333 125 400 125 533


    Original     		NT5TU256M4GE NT5TU128M8GE NT5TU64M16GG DDR2-667-CL5) DDR2-800-CL5) DDR2-1066-CL6) PDF

    NT5TU32M16DG

    Abstract: Nanya NT5TU32M16DG NT5T
    Text: NT5TU64M8DE / NT5TU32M16DG 512Mb DDR2 SDRAM Feature CAS Latency Frequency -3C/3CI* -AC/ACI* -BE* -BD* DDR2-667-CL5 (DDR2-800-CL5) (DDR2-1066-CL7) (DDR2-1066-CL6) Speed Bins Units Parameter Min. Max.


    Original     		NT5TU64M8DE NT5TU32M16DG 512Mb DDR2-667-CL5) DDR2-800-CL5) DDR2-1066-CL7) DDR2-1066-CL6) NT5TU32M16DG Nanya NT5TU32M16DG NT5T PDF

    DDR3-1866-CL12

    Abstract: NT5CB256M8GN-DI
    Text: 2Gb DDR3 SDRAM G-Die NT5CB256M8GN / NT5CC256M8GN Feature Table 1: CAS Latency Frequency Speed Bins -BE* -CG/CGI* -DI* -EJ* DDR3 L -1066-CL7 DDR3 (L)-1333-CL9 DDR3(L)-1600-CL11 Units DDR3-1866-CL12 Parameter Min. Max. Min. Max. Min. Max. Min. Max. tCK(Avg.)


    Original     		NT5CB256M8GN NT5CC256M8GN -1066-CL7 -1333-CL9 -1600-CL11 DDR3-1866-CL12 NT5CB256M8GN-DI PDF

    Untitled

    Abstract: No abstract text available
    Text: NT5CB256M8FN/NT5CB128M16FP NT5CC256M8FN/NT5CC128M16FP 2Gb DDR3 SDRAM F-Die Feature


    Original     		NT5CB256M8FN/NT5CB128M16FP NT5CC256M8FN/NT5CC128M16FP -1066-CL7 -1333-CL9 -1600-CL11 DDR3-1866-CL12 PDF

    NT5CB128M16HP-EK

    Abstract: No abstract text available
    Text: NT5CB128M16HP NT5CC128M16HP 2Gb DDR3 SDRAM H-Die Preliminary Datasheet Feature Table 1: CAS Latency Frequency -BE* -CG -DI* -EK* DDR3 L -1066-CL7 DDR3(L)-1333-CL9


    Original     		NT5CB128M16HP NT5CC128M16HP -1066-CL7 -1333-CL9 -1600-CL11 DDR3-1866-CL13 DDR3-2133-CL14 NT5CB128M16HP-EK PDF

    Untitled

    Abstract: No abstract text available
    Text: NT5TU128M8GE / NT5TU64M16GG 1Gb DDR2 SDRAM Feature CAS Latency Frequency Speed Bins -3C/3CI -AC/ACI/ACL -BE -BD DDR2-667-CL5 (DDR2-800-CL5) (DDR2-1066-CL7) (DDR2-1066-CL6) Units Parameter Min. Max. Min. Max. Min. Max. Min. Max. tCK(Avg.) Clock Frequency


    Original     		NT5TU128M8GE NT5TU64M16GG DDR2-667-CL5) DDR2-800-CL5) DDR2-1066-CL7) DDR2-1066-CL6) PDF

    NT5CB256M16CP

    Abstract: NT5CC256M16CP NT5CC256M16CP-DI NT5CC512M8CN DDR3-2133-CL14 NT5CB512M8CN NT5CC512M8CN-DII NT5CB512M8CN-CG NT5CB256M16 NT5CC256M16CP-DII
    Text: 4Gb DDR3 SDRAM C-Die NT5CB512M8CN / NT5CB256M16CP NT5CC512M8CN / NT5CC256M16CP CAS Latency Frequency -BE* -CG* -DI/DII* -EK* -FL* DDR3/L-1066-CL7 DDR3/L-1333-CL9 DDR3/L-1600-CL11 DDR3-1866-CL13 DDR3-2133-CL14 Speed Bins Units tCK Parameter Min. Max. Min. Max.


    Original     		NT5CB512M8CN NT5CB256M16CP NT5CC512M8CN NT5CC256M16CP DDR3/L-1066-CL7 DDR3/L-1333-CL9 DDR3/L-1600-CL11 DDR3-1866-CL13 DDR3-2133-CL14 NT5CC256M16CP NT5CC256M16CP-DI NT5CC512M8CN-DII NT5CB512M8CN-CG NT5CB256M16 NT5CC256M16CP-DII PDF

    NT5CB64M16DP

    Abstract: nt5cb64m16 DDR3-2133-CL13 DDR3 pin out NT5CB64M16D NT5CB64m
    Text: NT5CB128M8DN/NT5CB64M16DP NT5CC128M8DN/NT5CC64M16DP 1Gb DDR3 D-die SDRAM Feature Table 1: CAS Latency Frequency Speed Bins Parameter -BE* -CF/CFI* -DH/DHI* -EI* -FK* DDR3/L-1066-CL7 (DDR3/L-1333-CL8) (DDR3/L-1600-CL10) (DDR3-1866-CL11) (DDR3-2133-CL13) Units


    Original     		NT5CB128M8DN/NT5CB64M16DP NT5CC128M8DN/NT5CC64M16DP DDR3/L-1066-CL7) DDR3/L-1333-CL8) DDR3/L-1600-CL10) DDR3-1866-CL11) NT5CB64M16DP nt5cb64m16 DDR3-2133-CL13 DDR3 pin out NT5CB64M16D NT5CB64m PDF

    NT5TU64M16GG

    Abstract: nt5tu64m
    Text: NT5TU128M8GE / NT5TU64M16GG 1Gb DDR2 SDRAM Feature CAS Latency Frequency -3C/3CI -AC/ACI/ACL -BE -BD DDR2-667-CL5 (DDR2-800-CL5) (DDR2-1066-CL7) (DDR2-1066-CL6) Speed Bins Units Parameter Min. Max.


    Original     		NT5TU128M8GE NT5TU64M16GG DDR2-667-CL5) DDR2-800-CL5) DDR2-1066-CL7) DDR2-1066-CL6) NT5TU64M16GG nt5tu64m PDF

    MDK150

    Abstract: md1p LR3000
    Text: Chapter 5 LR32D04 DRAM Data Buffer This chapter describes the LR32D04 DRAM Data Buffers. Chapter 5 is organized into these sections: • General Description ■ Signal Definitions ■ Data Buffer Configurations ■ Specifications Because the operation of the LR32D04 is closely tied to the LR3203


    OCR Scan     		LR32D04 LR3203 LR3203, LR32D MDK150 md1p LR3000 PDF

    LD11

    Abstract: LD12 LR3203 LR3205 LR32D04 LR3000
    Text: Chapter 5 LR32D04 DRAM Data Buffer This chapter describes the LR32D04 DRAM Data Buffers. Chapter 5 is organized into these sections: • General Description ■ Signal Definitions ■ Data Buffer Configurations ■ Specifications Because the operation of the LR32D04 is closely tied to the LR3203


    OCR Scan     		LR32D04 LR3203 LR3203, LD11 LD12 LR3205 LR3000 PDF

    IR3203

    Abstract: LR3000
    Text: Chapter 4 LR3203 DRAM Controller This chapter describes the LR3203 DRAM Controller. Chapter 4 is orga­ nized into these sections: • General Description ■ Concepts ■ Configuring the LR3203 ■ Signal Definitions ■ L-Bus Interface ■ DRAM Configurations


    OCR Scan     		LR3203 LR32D04 IR3203 LR3000 PDF

    C1A13

    Abstract: LR3000 DRAM controller dram memory 256kx4 lad2 5v LB03 LR3202A LR3203 LR3205 LR32D04
    Text: Chapter 4 LR3203 DRAM Controller This chapter describes the LR3203 DRAM Controller. Chapter 4 is orga­ nized into these sections: • General Description ■ Concepts ■ Configuring the LR3203 ■ Signal Definitions ■ L-Bus Interface ■ DRAM Configurations


    OCR Scan     		LR3203 LR3203 LR32D04 C1A13 LR3000 DRAM controller dram memory 256kx4 lad2 5v LB03 LR3202A LR3205 PDF

    Untitled

    Abstract: No abstract text available
    Text: »I 256K X 4 molaic V ìd e o R A M M V M 4 2 5 9 -1 0 /1 2 Issue 2.0 : February 1992 PRELIMINARY Mosaic Semiconductor Pin Definition 262,144 x 4 CMOS Fully Featured Video RAM sc c 1 SI01 c 2 Features DRAM organized as 262,144 words x 4 bits. SAM organized as 512 words x 4 bits.


    OCR Scan     		1/I01 W2/102 MVM4259VMB-10 MIL-STD883D CA92121 PDF

    LR3000

    Abstract: LR3000A
    Text: Chapter 3 LR3202A L-Bus Controller This chapter describes the LR3202A L-Bus Controller. Chapter 3 is organized into these sections: • General Description ■ Configuring the LR3202A ■ Programming the System Control Registers ■ Signal Definitions ■ L-Bus Operation


    OCR Scan     		LR3202A LR3202A LR3000 LR3000A PDF

    S2L00

    Abstract: No abstract text available
    Text: 256K x 4 molale V id e o R A M M V M 4 2 5 9 -1 0 /1 2 Issue 2.0 : February 1992 P R E L IM IN A R Y S e m ic o n d u c to r Inc. Pin Definition 262,144 X 4 CMOS Fully Featured Video RAM SC SI01 SI02 DT/OE W1/I01 W 2/I02 WB/WE NC RAS A8 A6 A5 A4 Vcc Features


    OCR Scan     		MIL-STD883D S2L00 PDF