gal20v8qs
Abstract: GAL20V8QS-15LNC GAL20V8S gal programming algorithm GAL20V8QS-10L cs 2648 GAL20V8QS15LMI WGB 03 HL 006 pAL programming Guide GAL20V8QS10LNC
Text: GAL20V8QS-10L, -15L 24-Pin 0.8ja EECMOS PLDs General Description Features T h e EECM OS G A L20V8Q S devices are fabricated using N atio n a l’s C S80BEV 0.8/x E lectrically E rasable CM O S pro cess. This advanced p rocess m akes N ational's G A L20V 8Q S extrem ely la st, allow ing contro lle d output
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GAL20V8QS-10L,
24-Pin
GAL20V8QS
CS80BEV
Cep-01451.
GAL20V8QS-15LNC
GAL20V8S
gal programming algorithm
GAL20V8QS-10L
cs 2648
GAL20V8QS15LMI
WGB 03 HL 006
pAL programming Guide
GAL20V8QS10LNC
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Untitled
Abstract: No abstract text available
Text: HIGH-SPEED BiCMOS ECL STATIC RAM 64K 16Kx 4-BIT PRELIMINARY IDT 100494 FEATURES: DESCRIPTION: • 16,384-w ords x 4 -b it o rg a n iza tio n • A ddress a ccess tim e : 8 /1 0 /1 5n s (max.) • Low p o w e r d issip a tio n : 500m W (typ.) T h e ID T100494 is a 65,536-bit h ig h -sp ee d BiC E M O S ECL
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384-w
T100494
536-bit
400mll)
350mll)
S12-30
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MBM100480
Abstract: 100K series ECL MBM100480-25
Text: FUJITSU M ICROELECTRONICS. INC. ^ , G^g 0 MBM100480-25 ECL 16,384-BIT BIPOLAR RANDOM ACCESS MEMORY PRELIMINARY DESCRIPTION The Fujitsu MBM100480-25 is a fu lly d e c o d e d 16384-bit ECL read/w rite random access m em ory designed for m ain, control and buffer storage applications.
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MBM100480-25
16384-bit
MBM100480-25
384-BIT
MBM100480
100K series ECL
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static ram 64K
Abstract: s1214
Text: HIG H-SPEED BiCMOS ECL STATIC RAM 64K 64K x 1-BIT Integrated Devk:eTechnology. Inc PRELIMINARY IDT 100490 FEATURES: DESCRIPTION: • 65,536-w ords x 1-bit o rga n izatio n • Low p o w e r d issip a tio n : 320m W (typ.) • Fu lly c o m p a tib le w ith 100K lo g ic level
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536-w
T100490
536-bit
S12-14
IDT100490
S12-15
static ram 64K
s1214
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Untitled
Abstract: No abstract text available
Text: SONY CXK5V8257BTM/BYM/BM •70LLX/85LLX*/1 OLLX* 32768-word x 8-bit High Speed CMOS Static RAM * Only TSOP available * * Only SOP available D escription The CXK5V8257BTM/BYM/BM is 262,144 bits high speed CMOS static RAM organized as 32,768 words by 8 bits.
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CXK5V8257BTM/BYM/BM
70LLX/85LLX
32768-word
CXK5V8257BTM/BYM/BM
-70LLX
-85LLX
-10LLX
CXK5V8257BM
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Untitled
Abstract: No abstract text available
Text: FUJITSU MICROELECTRONICS F U J IT S U 23E D • 374m2 ECK16384-BIT»*W BIPOLAR RANDOM' G0Gfl27S 7 ■ MBM100480A-8 May 1988 Edition 1.0 " P 4 k -2 .V O S 16384-BIT BIPOLAR ECL RANDOM ACCESS MEMORY The Fujitsu MBM100480A Is a fully decoded 16384-blt ECL read/w rite random access
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374m2
ECK16384-BITÂ
G0Gfl27S
MBM100480A-8
16384-BIT
MBM100480A
16384-blt
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C819
Abstract: GF032
Text: F U JIT SU ECL 16384- BI T B I P OL AR R A N D O M ACCESS MEMORY MBM100480A-10 May 1988 Edition 1.0 16384-BIT BIPOLAR ECL RANDOM ACCESS MEMORY The Fujitsu MBM100460A I* a fully decoded 16384-bit ECL read/write random accata m emory daaignad fo r main m emory, control and buffar storage application». This device
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MBM100480A-10
16384-BIT
MBM100460A
MBM100480A
C819
GF032
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Untitled
Abstract: No abstract text available
Text: FUJITSU MICROELECTRONICS H3E D • 374T7b2 OOOñl?'! O ■ T - % 'Z 3 - 0 S E G i 4096^ B n Ä i l F U J IT S U BIPOLARI RAN DOI ACCESStMEMORY MBM100470A-7 August 1986 Edition 1.0 4096-BIT BIPOLAR ECL RANDOM ACCESS MEMORY The Fujitsu MBM100470A Is a fully decoded 4096-bit
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374T7b2
MBM100470A-7
4096-BIT
MBM100470A
4096-bit
18-PAD
LCC-18C-F01)
C18009S
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100422A
Abstract: MBM100422A 100422
Text: F U JIT S U ECL 1024-BIT BIPOLAR RANDOM ACCESS MEMORY MBM 100422A-5 MBM 100422A-7 A p r il 1987 E d itio n 3.0 1024-BIT BIPOLAR ECL RANDO M ACCESS M EM O RY The Fujitsu MBM 100422A is fu lly decoded 1024-bit ECL read/w rite random access memory designed fo r high-speed scratch pad, control and buffe r storage
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1024-BIT
00422A
deviPT-24C
KX5422A-7
24-PAD
LCC-MC-F03I
100422A
MBM100422A
100422
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3S4 tube
Abstract: 0-12V 74VHC AC ammeter and ct diagram schematic diagram 0-12v power supply
Text: 54VHC/74VHC4066 Quad Analog Switch General Description Features These devices are digitally controlled analog switches utiliz ing advanced silicon-gate CMOS technology. These switches have low "o n ” resistance and low “ off” leakages. They are bidirectional switches, thus any analog input may
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54VHC/74VHC4066
Cep41451,
3S4 tube
0-12V
74VHC
AC ammeter and ct diagram
schematic diagram 0-12v power supply
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100474
Abstract: SY100474 SY101474 Y1047
Text: * SYNERGY SY 10474-3/4/5/7 S Y 1 00474-3/4/5/7 S Y 101474-3/4/5/7 1K X 4 E C L R A M S E M IC O N D U C T O R FEA TU R E S D E S C R IP T IO N • Address access time, tAA: 3/4/5/7ns max. ■ Chip select access tim e, tAC: 2ns max. ■ Write pulse width, tww: 3ns min.
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SY10474-3/4/5/7
SY100474-3/4/5/7
SY101474-3/4/5/7
500ps
-300mA,
-220mA
10K/100K
SY10/100/101474-3FCF
SY10/100/101474-3MCF
F24-1
100474
SY100474
SY101474
Y1047
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SY101L484
Abstract: No abstract text available
Text: TD013Ö1 QDDD07C1 b27 S7E D SYNERGY SEMICONDUCTOR Address access time, tAA: 7/8/1 Ons max. Chip select access time, tAc: 3/4/5ns max. Eliminates write recovery glitch found on competitors’ ECL RAMs Low power supply current, I e e : -180m A min. Designed for alpha particle immunity
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TD013
QDDD07C
-180m
10K/100K/
101KECL
384-bit
SY10L/10017101L484-7PCS
SY10L/100L/101L484-7FCS
SY10L/100L/101L484-7YCS
SY10L/100L/101L484-8PCS
SY101L484
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100422a-5
Abstract: No abstract text available
Text: FU JITSU ECL 1024-BIT BIPOLAR RANDOM ACCESS MEMORY MBM 100422A-5 MBM 100422A-7 April 1987 Edition 3.0 1024-BIT B IP O L A R E C L RANDOM A C C ESS M EM ORY The Fu jitsu MBM 100422A is fu lly decoded 1024-bit E C L read/write random access memory designed for high-speed scratch pad, control and buffer storage
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1024-BIT
00422A-5
00422A-7
00422A
10P-II
24-LEA
FPT-24C-C02)
100422a-5
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A1281
Abstract: KMC SERIES CAPACITORS OZ 9910 a MAX405 MAX405CPA MAX405CSA MAX405EPA MAX405ESA 099-40
Text: 19-3819; Rev 1; 5/96 Precision Video B uffer A m plifier G eneral Description T he M AX405 is id e a l as a 5 0 ÎÎ a n d 75Î2 co a xia l c a b le d riv e r for co lo r v id e o sig n a ls. G u a ra n te e d 6 0 m A c o n tin u o u s o u tp u t c u rre n t e lim in a te s th e n e e d fo r
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MAX405
180MHz
50V/ns
A1281
KMC SERIES CAPACITORS
OZ 9910 a
MAX405CPA
MAX405CSA
MAX405EPA
MAX405ESA
099-40
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Untitled
Abstract: No abstract text available
Text: « S Y 1 0422-3/4/5/7 SY1 00422-3/4/5/7 S Y 101422-3/4/5/7 S Y101 M 422-5/7 256 x 4 ECL RAM SYNERGY S E M IC O N D U C T O R F E A TU R E S D E S C R IP TIO N Address access time, 3/4/5/7ns max. tAA: Block select access time, tAB: 2ns max. Write pulse width, tww: 3ns min.
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500ps
-200mA
10K/100K
Sel100/101422-5DCS
SY10/100/101422-5FCS
SY10/100/101422-5JCS
SY10/100/101422-5JCSTR
SY10/100/101422-5PCS
101M422-5DCS
SY101M422-5PCS
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H157D1
Abstract: D1113 A7 NPN EPITAXIAL TRANSISTOR D1113 ECL100K ECL10K Q14000B Q2100B Q6000B Q9100B
Text: PRELIMINARY DEVICE SPECIFICATION Q14000 SERIES BiCMOS LOGIC ARRAYS DESCRIPTION The AM CC Q14000 Series of BiCM OS logic arrays is com prised of four products with densities of 2160, 5760, 9072 and 13,440 equivalent gates. The series is optimized to provide CMOS densities with b ip ola r perform ance
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Q14000
/D1113-0988
H157D1
D1113
A7 NPN EPITAXIAL
TRANSISTOR D1113
ECL100K
ECL10K
Q14000B
Q2100B
Q6000B
Q9100B
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BECKMAN helipot potentiometer
Abstract: BECKMAN helipot Helipot POTENTIOMETER clarostat POTENTIOMETER TYPE EJ sangamo capacitor type 500 sangamo capacitor Helipot inverter circuit diagram electra helipot 10 turn beckman instruments sangamo "current transformer"
Text: I N D U S T R I A L AND ANÂLOG N U C L E A R I N S T R U M E N T S COMPUTERS BECKMAN INSTRUMENTS, INC. 22 00 WRI GHT AVE., RI CHMOND, CALIF. TELEPHO N E. LANDSCAPE 6 -773 0 / WARNING Do not attempt to operate this instrument until you have read the Instruction Manual.
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AT07-Â
77V4/Y
BECKMAN helipot potentiometer
BECKMAN helipot
Helipot POTENTIOMETER
clarostat POTENTIOMETER TYPE EJ
sangamo capacitor type 500
sangamo capacitor
Helipot
inverter circuit diagram electra
helipot 10 turn beckman instruments
sangamo "current transformer"
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reference design tegra 2
Abstract: No abstract text available
Text: VFC100 B U R R -B R O W N | b b | AVAILABLE IN DIE FORM Synchronized VOLTAGE-TO-FREQUENCY CONVERTER FEATURES DESCRIPTION • F U L L-S C A LE FR EQ U EN C Y SET BY SYSTEM CLOCK. NO CRITICAL EX T ER N A L C OM PONENTS REQUIRED T he VFCIOO v o lta ge-to-freq u en cy converter is an
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VFC100
100kHz
50ppm/
reference design tegra 2
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74ls82
Abstract: 74245 BIDIRECTIONAL BUFFER IC 74ls150 ph 4531 diode 4583 dual schmitt trigger ic D flip flop 7474 74245 BUFFER IC ic 7483 BCD adder data sheet ic 74139 Quad 2 input nand gate cd 4093
Text: General Features The SCxD4 series of high perform ance CM O S gate arrays offers the user the ability to realise custom ised VLSI inte grated circuits featuring the speed perform ance previously obtainable only with bipo lar tech nolog ies whilst retaining all
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L1373
Abstract: l1373-4 COP820CJ COP822C
Text: April 1992 COP820CJMH/COP822CJMH Single-Chip microCMOS Microcontroller Features • Form, fit and function em ulation device for the COP82C CJ/COP822CJ ■ Fully static CMOS ■ 1 f x s instruction time ■ Single supply operation: 4.5V to 6.0V ■ 8191 x 8 on-chip ROM
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COP820CJMH/COP822CJMH
COP820CJMH
COP822CJMH
COP820CJ
28-pin
20-pin
16-bit
L1373
l1373-4
COP822C
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64 CERAMIC LEADLESS CHIP CARRIER LCC
Abstract: PD3024
Text: AmPAL*10H20EV8/AmPAL10020EV8 IMOX-III ECL Programmable Array Logic PRELIMINARY • • • • • High-performance tpo = 6 ns, fMAX - 125 MHz Eight user-programmable output logic m acrocells for registered or combinatorial operation A latched version of the d evice is available a s AmP A L1 0 H 2 0 E G 8 or A m P A L I 0 0 2 0 EG 8 se e AMD Publica
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10H20EV8/AmPAL10020EV8
Am-PAL10H20EG8
0020EG8
6545A)
ZL30A
AmPAL10H20EV8/AtnPAL10020EV8
64 CERAMIC LEADLESS CHIP CARRIER LCC
PD3024
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SERVICE MANUAL oki 32 lcd tv
Abstract: 1DC2A hlx crystal USER MANUAL oki 32 lcd tv HPC46004V20 1ale SERVICE MANUAL oki 23 lcd tv 1DC2 USER S MANUAL oki 32 lcd tv Aleph
Text: JD M %* w jz £9 National ÆÆ Semiconductor H P C 1 6 0 6 4 /2 6 0 6 4 /3 6 0 6 4 /4 6 0 6 4 /1 6 0 0 4 /2 6 0 0 4 / 3 6 0 0 4 /4 6 0 0 4 H ig h-P erfo rm ance m ic ro c o n tro lle r General Description Features The HPC46064 and HPC46004 are m em bers o f the H P C t m
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PC16064/26064/36064/46064/16004/26004/
HPC46064
HPC46004
SERVICE MANUAL oki 32 lcd tv
1DC2A
hlx crystal
USER MANUAL oki 32 lcd tv
HPC46004V20
1ale
SERVICE MANUAL oki 23 lcd tv
1DC2
USER S MANUAL oki 32 lcd tv
Aleph
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gal 16v8 programming algorithm
Abstract: gal programming algorithm GAL programming Guide GAL16V8QS TAT 2159 opal 16V8A 16V8Q 16V8QS gal programming specification
Text: Semiconductor GAL16V8QS-10L, -15L 20-Pin 0.8jli EEC M O S PLD s General Description Features Th e EECM OS G AL16V8Q S devices are fabricated using N ational’s CS80BEV 0.8|u. E lectrically Erasable C M O S pro cess. This advanced process m akes N ational’s
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GAL16V8QS-10L,
20-Pin
GAL16V8QS
CS80BEV
Cep-01451,
gal 16v8 programming algorithm
gal programming algorithm
GAL programming Guide
TAT 2159
opal
16V8A
16V8Q
16V8QS
gal programming specification
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cd4066 spice model
Abstract: ic cd4066 GE 8111 nimh spice model charge PIN CONFIGURATION IC CD4066 rtl 8111 LMC6582 LMC6582AIM LMC6582AIMX LMC6582AIN
Text: Semiconductor March 1995 LM C6582 D u al/L M C 65 84 Quad Low V oltage, R ail-To-R ail Input and O utput CMOS O perational A m plifier General Description Features The L M C 6 5 8 2/4 is a high perform ance operational am plifier w hich can operate o ver a w ide range of supply voltages,
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LMC6582
Dual/LMC6584
LMC6582/4
12Q-3A
212-11B1
cd4066 spice model
ic cd4066
GE 8111
nimh spice model charge
PIN CONFIGURATION IC CD4066
rtl 8111
LMC6582AIM
LMC6582AIMX
LMC6582AIN
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