54F398DM
Abstract: 54F398FM 54F398LM 74F398 74F398PC 74F398SC 74F399
Text: 54F 74F398 54F 74F399 Quad 2-Port Register General Description Features The ’F398 and ’F399 are the logical equivalents of a quad 2-input multiplexer feeding into four edge-triggered flipflops A common Select input determines which of the two 4-bit words is accepted The selected data enters the flipflops on the rising edge of the clock The ’F399 is the 16-pin
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74F398
74F399
16-pin
74F398PC
20-Lead
20-3A
54F398DM
54F398FM
54F398LM
74F398
74F398PC
74F398SC
74F399
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74VCX162374
Abstract: 74VCX162374MTD MTD48 VCX162374
Text: Preliminary Revised November 1999 74VCX162374 Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in Outputs Preliminary General Description Features The VCX162374 contains sixteen non-inverting D-type flipflops with 3-STATE outputs and is intended for bus oriented
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74VCX162374
16-Bit
VCX162374
74VCX162374
74VCX162374MTD
MTD48
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PDF
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74AC377
Abstract: 74AC377MTC 74AC377SC 74AC377SJ 74ACT377 74ACT377MTC 74ACT377SC 74ACT377SJ
Text: 74AC377, 74ACT377 Octal D-Type Flip-Flop with Clock Enable Features General Description • ICC reduced by 50% The AC/ACT377 has eight edge-triggered, D-type flipflops with individual D inputs and Q outputs. The common buffered Clock CP input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.
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74AC377,
74ACT377
AC/ACT377
ACT377
74ACT377
74AC377
74AC377MTC
74AC377SC
74AC377SJ
74ACT377MTC
74ACT377SC
74ACT377SJ
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74ABT16374
Abstract: 74ABT16374CMTD 74ABT16374CSSC MS48A MTD48
Text: Revised January 1999 74ABT16374 16-Bit D-Type Flip-Flop with 3-STATE Outputs General Description Features The ABT16374 contains sixteen non-inverting D-type flipflops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock
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74ABT16374
16-Bit
ABT16374
ABT374
74ABT16374
74ABT16374CMTD
74ABT16374CSSC
MS48A
MTD48
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PDF
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74LS273
Abstract: M20D MM74HC273 MM74HC273M MM74HC273MTC MM74HC273N MM74HC273SJ MTC20
Text: Revised February 1999 MM74HC273 Octal D-Type Flip-Flops with Clear General Description The MM74HC273 edge triggered flip-flops utilize advanced silicon-gate CMOS technology to implement D-type flipflops. They possess high noise immunity, low power, and speeds comparable to low power Schottky TTL circuits.
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MM74HC273
MM74HC273
74LS273.
74LS273
M20D
MM74HC273M
MM74HC273MTC
MM74HC273N
MM74HC273SJ
MTC20
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SO56-2
Abstract: IDT74ALVCH16721
Text: IDT74ALVCH16721 3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 20-BIT FLIPFLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: IDT74ALVCH16721 DESCRIPTION: This 20-bit flip-flop is built using advanced dual metal CMOS technology. The 20 flip-flops of the ALVCH16721 are edge-triggered D-type flipflops with qualified clock storage. On the positive transition of the clock
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IDT74ALVCH16721
20-BIT
ALVCH16721
250ps
MIL-STD-883,
200pF,
635mmIDT
SO56-2
IDT74ALVCH16721
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DM74LS373
Abstract: DM74LS533 DM74LS533N DM74LS533WM MS-001 MS-013
Text: Revised March 2000 DM74LS533 Octal Transparent Latch with 3-STATE Outputs General Description Features The DM74LS533 consists of eight latches with 3-STATE outputs for bus organized system applications. The flipflops appear transparent to the data when Latch Enable
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DM74LS533
DM74LS533
DM74LS373,
DM74LS373
DM74LS373WITHOUT
DM74LS533N
DM74LS533WM
MS-001
MS-013
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PDF
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Untitled
Abstract: No abstract text available
Text: Revised October 2004 74VCX16821 Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs General Description Features The VCX16821 contains twenty non-inverting D-type flipflops with 3-STATE outputs and is intended for bus oriented applications.
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74VCX16821
20-Bit
VCX16821
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W16A
Abstract: 54279DMQB 54279FMQB C1995 DM74 DM74279 DM74279N J16A N16E
Text: 54279 DM74279 Quad Set-Reset Latch General Description This device contains four independent set-reset type flipflops with one Q output each Connection Diagram Dual-In-Line Package TL F 9785 – 1 Order Number 54279DMQB 54279FMQB or DM74279N NS Package Number J16A N16E or W16A
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DM74279
54279DMQB
54279FMQB
DM74279N
C1995m
W16A
C1995
DM74
DM74279N
J16A
N16E
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PDF
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74ALVC16374
Abstract: 74ALVC16374GX 74ALVC16374MTD ALVC16374 MO-205 MTD48
Text: Revised May 2005 74ALVC16374 Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs General Description Features The ALVC16374 contains sixteen non-inverting D-type flipflops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock
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74ALVC16374
16-Bit
ALVC16374
74ALVC16374
74ALVC16374GX
74ALVC16374MTD
MO-205
MTD48
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PDF
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T74LS273B1
Abstract: LS273 T54LS273D2 T74LS273C1 LHAD
Text: T54LS273 T74LS273 S S 8-BIT REGISTER WITH CLEAR DESCRIPTION The T54LS273/T74LS273 is a high speed 8-Bit Re gister. The register consists of eight D-Type Flipflops with a Common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3 inch lead spacing.
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T54LS273
T74LS273
T54LS273/T74LS273
20-pin
T74LS273B1
LS273
T54LS273D2
T74LS273C1
LHAD
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PDF
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20 pin zif socket
Abstract: MS-012-AB 74ALS 74ALS377 N74ALS377D N74ALS377N TEXTOOL SOCKET DIP16 26 SIGNETICS TEXTOOL zif socket
Text: Signetics 74ALS377 Flip-Flop Octal D Flip-Flop With Enable Preliminary Specification ALS Products FEATURES • Ideal for addressable register applications • Enable for address and data syn chronization applications • Eight edge-triggered D-type flipflops
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74ALS377
ALS273
ALS373
ALS374
5M-1982.
eounterdock-22)
20 pin zif socket
MS-012-AB
74ALS
N74ALS377D
N74ALS377N
TEXTOOL SOCKET DIP16
26 SIGNETICS
TEXTOOL zif socket
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PDF
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E530
Abstract: MS-012-AB 74ALS 74ALS273 N74ALS273D N74ALS273N 26 SIGNETICS
Text: Signetics 74ALS273 Flip-Flop Octal D Flip-Flop Preliminary Specification ALS Products FEATURES • Eight edge-triggered O-type flipflops • Buffered common clock • Buffered asynchronous Master Reset • See 'ALS377 for clock enable version TYPICAL fMAX
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74ALS273
ALS377
ALS373
ALS374
50MHz
20-Pin
N74ALS273N
N74ALS273D
E530
MS-012-AB
74ALS
N74ALS273D
N74ALS273N
26 SIGNETICS
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PDF
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Untitled
Abstract: No abstract text available
Text: FAST CM O S O CTAL D FLIP-FLOP WITH CLEAR IDT54/74FCT273 IDT54/74FCT273A FEATURES: DESCRIPTION: • IDT54/74FCT273 equivalent to FAST speed; The IDT54/74FCT273 and IDT54/74FCT273A are octal D flipflops built using advanced CEMOS™, a dual metal CMOS tech
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IDT54/74FCT273
IDT54/74FCT273A
IDT54/74FCT273
IDT54/74FCT273A
MIL-STD-883,
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PDF
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Untitled
Abstract: No abstract text available
Text: A I R C H I L D pe b m 7 J 9 Revised Aprii 1999 S E M ¡CONDUCTOR TM General Description Features T h e LC X16374 contains sixteen non-inverting D -type flipflops w ith 3-STATE outputs and is intended fo r bus oriented applications. The device is byte controlled. A buffered clock
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X16374
16-bit
LCX16374
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LS 373
Abstract: als373
Text: AVG Semiconductors DDi Technical Data 373 Octal D-Type 3-State Transparent Latch DV74LS373 DV74ALS373 The DV74LS/74ALS373 circuits consist of eight latches with 3' state outputs for bus organized system applications. The flipflops appear transparent to the data data changes asynchronously . The high-impedance state and increased high-logic
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DV74LS373
DV74ALS373
DV74LS/74ALS373
ALS373
LS373
1-800-AVG-SEMI
0DDD22A
DV74LS373,
LS 373
als373
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004II
Abstract: No abstract text available
Text: H D 7 4 A C 1 0 9 / H D 7 4 A C T 1 0 9 *r;“ho„Po’ ”Ed°”T,s»«*d Description The HD74AC109/HD74ACT109 consists of two high speed completely independent transition clocked JK flipflops. The clocking operaiton is independent of rise and fall times of the clock waveform. The JK design allows
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HD74AC109/HD74ACT109
HD74AC74
74ACT109
Dia112
T-90-20
004II
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PDF
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Untitled
Abstract: No abstract text available
Text: High-Reliability Advanced CMOS Logic IC s_ m 37E D 430E571 O O S b l ? 11 2 I IHAS HARRIS SEIUCOND SECTOR Recent Additions CD54AC175/3A CD54ACT175/3A 0°l Quad D Flip-Flop with Reset The RCA CD54AC175 and CD54ACT175 are quad 0 flipflops with reset that utilize the new RCA ADVANCED CMOS
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430E571
CD54AC175/3A
CD54ACT175/3A
CD54AC175
CD54ACT175
CD54AC/ACT175
16-lead
92CS-369SOR1
CD54AC273/3A
CD54ACT273/3A
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Untitled
Abstract: No abstract text available
Text: 3.3V CMOS 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: - CMOS technology. The ALVCH162821 device can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20-bit flipflops are edge-triggered D-type flip-flops. On the positive
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20-BIT
250ps
MIL-STD-883,
200pF,
635mm
IDT74ALVCH162821
ALVCH162821:
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Untitled
Abstract: No abstract text available
Text: & March 1993 74ACTQ18823 18-Bit D Flip-Flop with TRI-STATE Outputs General Description Features The ’ACTQ18823 contains eighteen non-inverting D flipflops with TRI-STATE outputs and is intended for bus orient ed applications. The device is byte controlled. A buffered
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74ACTQ18823
18-Bit
ACTQ18823
20-3A
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PDF
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Untitled
Abstract: No abstract text available
Text: Revised D ecem ber 1998 EMICQNDUCTGR tm 74ACTQ16374 16-Bit D-Type Flip-Flop with 3-STATE Outputs General Description Features T h e A C T Q 1 6374 contains sixteen non-inverting D-type flipflops w ith 3-STATE outputs and is intended fo r bus oriented applications. The device is byte controlled. A buffered clock
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74ACTQ16374
16-Bit
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PDF
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Untitled
Abstract: No abstract text available
Text: 7 T S ci 2 3 7 un 1S 6 TH Q033b24 SGS-'mOMSOM ~ r-V é -o 7 V o T74LS378 IM [H ì [I[L i S ¥ [H ì® iO © i HEX PARALLEL D REGISTER WITH ENABLE • 8-BIT HIGH SPEED PARALLEL REGISTER ■ POSITIVE EDGE-TRIGGERED D-TYPE FLIPFLOPS ■ FULLY BUFFERED COMMON CLOCK AND
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Q033b24
T74LS378
T74LS378
T74LS174,
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PDF
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Untitled
Abstract: No abstract text available
Text: „ Revised April 1999 s e m ic o n d u c to r General Description Features T h e VCX16821 contains tw enty non-inverting D -type flipflops w ith 3-STATE outputs and is intended fo r bus oriented applications. • 1.6 5 V -3 .6 V V c c supply operation
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74VCX16821
74VCX16821
20-Bit
VCX16821
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PDF
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LS373
Abstract: ALS373 LS-373 DV74ALS373
Text: DDT A VG Semiconductors Technical Data 373 Octal D-Type 3-State Transparent Latch DV74LS373 DV74ALS373 The DV74LS/74ALS373 circuits consist of eight latches with 3state outputs for bus organized system applications. The flipflops appear transparent to the data data changes asynchronously . The high-impedance state and increased high-logic
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DV74LS/74ALS373
DV74LS373,
DV74ALS373
1-800-AVG-SEMI
LS373
ALS373
LS373
1-800-AVG-SEMI
DV74ALS373
LS-373
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PDF
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