Untitled
Abstract: No abstract text available
Text: HD10160 12-b it Parity G enerator/Checker The H D 1 0 1 6 0 consists of nine Exclusive-OR gates Unconnected inputs are pulled to low logic levels in allowing parity detection and generation fo r less a single package, internally connected to provide odd parity checking or generation. O u tp u t
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18-50V
Abstract: No abstract text available
Text: H D 10160 1 2 - b it P a r it y G e n e r a t o r / C h e c k e r Unconnected inputs are pulled to low logic levels • _ _ _ _ _ _ anH n e n p r a tin n fo r leSS The H D10160 consists of nine Exclusive-OR gates in a single package, internally connected to
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HD10160
12-bit
18-50V
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HD10131
Abstract: HD10125 HD10231 HD10116 HD100112 HD10K HD10130 HM10474
Text: CONTENTS • G E N E R A L I N F O R M A T I O N . 4 • Definition of Letter Symbols and Abbreviations.
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WD10K
HD100K
4096-word
HMJQG48G-
16384-word
HM100480F
HD10131
HD10125
HD10231
HD10116
HD100112
HD10K
HD10130
HM10474
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FLT-50
Abstract: No abstract text available
Text: H D 10160 1 2 -bit Parity G enerator/C hecker The HD 10160 consists of nine Exclusive-OR gates in a single package, internally connected to provide odd parity checking or generation. Output Unconnected inputs are pulled to low logic levels allowing parity detection and generation for less
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flt-50
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HD10160
Abstract: No abstract text available
Text: H D 10160 1 2 - b it P a r it y G e n e r a t o r / C h e c k e r Unconnected inputs are pulled to low logic levels • _ anH n e n p r a tin n fo r leSS The H D10160 consists of nine Exclusive-OR gates in a single package, internally connected to than 12 bits.
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HD10160
12-bit
HD10160
-301C
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