Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    HD74A Search Results

    SF Impression Pixel

    HD74A Price and Stock

    Texas Instruments SN74AC14PWR

    Inverters Hex Schmitt-Trigger
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics SN74AC14PWR 22,671
    • 1 $0.5
    • 10 $0.393
    • 100 $0.294
    • 1000 $0.179
    • 10000 $0.149
    Buy Now

    Texas Instruments SN74ACT245PWR

    Bus Transceivers Tri-State Octal
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics SN74ACT245PWR 17,198
    • 1 $1.06
    • 10 $0.95
    • 100 $0.741
    • 1000 $0.483
    • 10000 $0.412
    Buy Now

    Texas Instruments SN74ACT373PWR

    Latches Tri-St Octal D-Type
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics SN74ACT373PWR 15,281
    • 1 $0.9
    • 10 $0.813
    • 100 $0.634
    • 1000 $0.413
    • 10000 $0.352
    Buy Now

    Texas Instruments SN74AC244PWR

    Buffers & Line Drivers Tri-State Octal
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics SN74AC244PWR 9,544
    • 1 $0.84
    • 10 $0.715
    • 100 $0.549
    • 1000 $0.383
    • 10000 $0.324
    Buy Now

    Texas Instruments CD74ACT245M96

    Bus Transceivers Tri-State Non-Invert
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics CD74ACT245M96 8,759
    • 1 $1.24
    • 10 $1.12
    • 100 $0.873
    • 1000 $0.569
    • 10000 $0.486
    Buy Now

    HD74A Datasheets (500)

    Part ECAD Model Manufacturer Description Curated Type PDF
    HD74AC Hitachi Semiconductor HD74AC Series Common Information Original PDF
    HD74AC Renesas Technology Original PDF
    HD74AC00 Hitachi Semiconductor Quad 2-input Nand Gate Original PDF
    HD74AC00 Renesas Technology Quad 2-Input NAND Gate Original PDF
    HD74AC00 Renesas Technology Quad 2-Input NAND Gate Original PDF
    HD74AC00 Renesas Technology Quad 2-Input NAND Gate Original PDF
    HD74AC00FP Hitachi Semiconductor IC NAND GATE QUAD 2IN CMOS 14SOP Original PDF
    HD74AC00FP Renesas Technology Quad. 2-input NAND Gates Original PDF
    HD74AC00FP Hitachi Semiconductor Quad 2-lnput NAND Gate Scan PDF
    HD74AC00FPEL Renesas Technology IC NAND GATE QUAD 2IN CMOS 14SOP T/R Original PDF
    HD74AC00P Hitachi Semiconductor IC NAND GATE QUAD 2IN CMOS 14DIP Original PDF
    HD74AC00P Renesas Technology Quad. 2-input NAND Gates Original PDF
    HD74AC00P Hitachi Semiconductor Quad 2-lnput NAND Gate Scan PDF
    HD74AC00RP Hitachi Semiconductor IC NAND GATE QUAD 2IN CMOS 14SOP Original PDF
    HD74AC00RP Renesas Technology Quad. 2-input NAND Gates Original PDF
    HD74AC00RPEL Renesas Technology IC NAND GATE QUAD 2IN 14SOP T/R Original PDF
    HD74AC00RPEL Renesas Technology Quad 2-Input NAND Gate Original PDF
    HD74AC00T Hitachi Semiconductor IC NAND GATE QUAD 2IN CMOS 14TSSOP Original PDF
    HD74AC00T Renesas Technology Quad. 2-input NAND Gates Original PDF
    HD74AC00TELL Renesas Technology IC NAND GATE QUAD 2IN 14 pin TSSOP T/R Original PDF
    ...

    HD74A Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Hitachi DSA0095

    Abstract: 1B10 1B12 HD74ALVCH16269
    Text: HD74ALVCH16269 12-bit to 24-bit Registered Bus Transceivers with 3-state Outputs ADE-205-136 Z Preliminary 1st. Edition May 1996 Description The HD74ALVCH16269 is used in applications where two separate ports must be multiplexed onto, or demultiplexed from, a single port. The device is particularly suitable as an interface between


    Original
    PDF HD74ALVCH16269 12-bit 24-bit ADE-205-136 HD74ALVCH16269 Hitachi DSA0095 1B10 1B12

    Hitachi DSA00104

    Abstract: HD74ALVC162831
    Text: HD74ALVC162831 1-bit 4-bit Address Register / Driver with 3-state Outputs ADE-205-200 Z Preliminary 1st. Edition November 1997 Description This 1-bit to 4-bit address register / driver is designed for 2.3 V to 3.6 V VCC operation. The device is ideal for use in applications in which a single address bus is driving four separate memory locations. The


    Original
    PDF HD74ALVC162831 ADE-205-200 HD74ALVC162831 D-85622 Hitachi DSA00104

    2Y16

    Abstract: 1y14 Hitachi DSA00104 HD74ALVC16830 2Y14
    Text: HD74ALVC16830 1-bit to 2-bit Address Driver with 3-state Outputs ADE-205-198 Z Preliminary 1st. Edition November 1997 Description This 1-bit to 2-bit address driver is designed for 2.3 V to 3.6 V VCC operation. To ensure the high impedance state during power up or power down, the output ebable ( ) input should be tied to VCC


    Original
    PDF HD74ALVC16830 ADE-205-198 D-85622 2Y16 1y14 Hitachi DSA00104 HD74ALVC16830 2Y14

    Hitachi DSA0095

    Abstract: DP-14 FP-14DA FP-14DN HD74AC74 TTP-14D
    Text: HD74AC74 Dual D-Type Positive Edge-Triggered Flip-Flop ADE-205-361 Z 1st. Edition Sep. 2000 Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse.


    Original
    PDF HD74AC74 ADE-205-361 HD74AC74 Hitachi DSA0095 DP-14 FP-14DA FP-14DN TTP-14D

    Hitachi DSA0098

    Abstract: 1B10 1B12 HD74ALVCHR162269
    Text: HD74ALVCHR162269 12-bit to 24-bit Registered Bus Exchanger with 3-state Outputs ADE-205-190 Z Preliminary, 1st. Edition February 1997 Description The HD74ALVCHR162269 is a 12-bit to 24-bit registered bus exchanger, which is intended for applications where two separate ports must be multiplexed onto, or demultiplexed from, a single port. It is


    Original
    PDF HD74ALVCHR162269 12-bit 24-bit ADE-205-190 HD74ALVCHR162269 sequ2000 D-85622 Hitachi DSA0098 1B10 1B12

    Hitachi DSA0095

    Abstract: HD74ALVCH16501
    Text: HD74ALVCH16501 18-bit Universal Bus Transceivers with 3-state Outputs ADE-205-168A Z 2nd. Edition December 1999 Description Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the


    Original
    PDF HD74ALVCH16501 18-bit ADE-205-168A Hitachi DSA0095 HD74ALVCH16501

    HD74ALVCF162835

    Abstract: Hitachi DSA00115
    Text: HD74ALVCF162835 18-bit Universal Bus Driver with 3-state Outputs ADE-205-227E Z Preliminary, 6th. Edition Feb. 1, 1999 Description The HD74ALVCF162835 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by the output enable (OE). The device operates in the transparent mode


    Original
    PDF HD74ALVCF162835 18-bit ADE-205-227E HD74ALVCF162835 Hitachi DSA00115

    HD74ALVCH16836

    Abstract: Hitachi DSA00115
    Text: HD74ALVCH16836 20-bit Universal Bus Driver with 3-state Outputs ADE-205-213 Z Preliminary, 1st. Edition January 1998 Description This 20-bit universal bus driver is designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by the output enable (O E) input. The device operates in the


    Original
    PDF HD74ALVCH16836 20-bit ADE-205-213 mini97 D-85622 HD74ALVCH16836 Hitachi DSA00115

    1B12

    Abstract: HD74ALVCH16260 DSA003634
    Text: HD74ALVCH16260 12-bit to 24-bit Multiplexed D-type Latches with 3-state Outputs ADE-205-135B Z 3rd. Edition December 1999 Description The HD74ALVCH16260 is a 12-bit to 24-bit multiplexed D-type latch used in applications where two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical


    Original
    PDF HD74ALVCH16260 12-bit 24-bit ADE-205-135B HD74ALVCH16260 A1-A12, 1B1-1B12, 1B12 DSA003634

    DP-14

    Abstract: FP-14DA FP-14DN HD74AC86 HD74ACT86 TTP-14D Hitachi DSA003769
    Text: HD74AC86/HD74ACT86 Quad 2-Input Exclusive-OR-Gate Features • Outputs Source/Sink 24 mA • HD74ACT86 has TTL-Compatible Inputs Pin Arrangement 1 14 VCC 2 13 3 12 4 11 5 10 6 9 GND 7 8 Top view DC Characteristics (unless otherwise specified) Item Symbol


    Original
    PDF HD74AC86/HD74ACT86 HD74ACT86 HD74ACT86) HD74AC86 DP-14 FP-14DA FP-14DN HD74AC86 TTP-14D Hitachi DSA003769

    HD74ALVC1G00

    Abstract: DSA003635
    Text: HD74ALVC1G00 2–input NAND Gate ADE-205-604C Z Rev.3 Aug. 2001 Description The HD74ALVC1G00 has two–input NAND gate in a 5 pin package. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power


    Original
    PDF HD74ALVC1G00 ADE-205-604C HD74ALVC1G00 DSA003635

    HD74ALVCH162831

    Abstract: DSA003634
    Text: HD74ALVCH162831 1-bit 4-bit Address Register / Driver with 3-state Outputs ADE-205-195 Z Preliminary 1st. Edition March 1998 Description This 1-bit to 4-bit address register / driver is designed for 2.3 V to 3.6 V VCC operation. The device is ideal for use in applications in which a single address bus is driving four separate memory locations. The


    Original
    PDF HD74ALVCH162831 ADE-205-195 HD74ALVCH162831 DSA003634

    HD74ALVC2G06

    Abstract: DSA003635
    Text: HD74ALVC2G06 Triple Inverter Buffers / Drivers with Open Drain ADE-205-632A Z Rev. 1 August. 2001 Description The HD74ALVC2G06 has triple inverter buffers / drivers with open drain outputs in a 8 pin package. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook computers),


    Original
    PDF HD74ALVC2G06 ADE-205-632A HD74ALVC2G06 DSA003635

    HD74ALVCH16374

    Abstract: DSA003634
    Text: HD74ALVCH16374 16-bit D-type Flip Flops with 3-state Outputs ADE-205-123B Z 3rd. Edition December 1999 Description The HD74ALVCH16374 has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Data at the D inputs meeting set up requirements, are transferred to the Q outputs on positive


    Original
    PDF HD74ALVCH16374 16-bit ADE-205-123B HD74ALVCH16374 DSA003634

    Untitled

    Abstract: No abstract text available
    Text: HD74A C 241 / H D 7 4 A C T 2 4 1 ' “ Description The HD74A C 241 /H D 74ACT241 is an octal buffer and line driver designed to be em ployed as a memory address driver, clock driver and busoriented transmitter or receiver which provides im­ proved PC board density.


    OCR Scan
    PDF HD74A 74ACT241 HD74ACT241 T-90-20

    Untitled

    Abstract: No abstract text available
    Text: HM66205 S e rie s-524,288-Word x 8-Bit High Density CM O S Static RAM Module • PIN ARRANGEMENT Description The HM66205 is a high density 4M-bit static RAM module consisting of 4 pieces HM628128LTS products TSOP type 1M static RAM and a HD74ACT138FP equivalent product (SOP


    OCR Scan
    PDF HM66205 s------------524 288-Word HM628128LTS HD74ACT138FP HM6620S

    Untitled

    Abstract: No abstract text available
    Text: HD74AC138/HD74ACT138 Description • 1 - o f- 8 Decoder/Demultiplexer Pin Assignment The HD74AC138/HD74ACT138 is a high-speed l-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow


    OCR Scan
    PDF HD74AC138/HD74ACT138 HD74AC138/HD74ACT138 l-of-24 1-of32 HD74ACTc T-90-20

    Untitled

    Abstract: No abstract text available
    Text: H D 74A C 253/H D 74A C T 253* Description The HD74ACa53/HD74ACT253 is a dual 4-input multiplexer with 3-state outputs. It can select two bits of data from four sources using common select inputs. The outputs may be individually switched to a high impedance state with a High on the


    OCR Scan
    PDF HD74AC253/HD74ACT253* HD74ACa53/HD74ACT253 HD74ACT253 HD74AC253/HD74ACT253n

    Zo transistor h07

    Abstract: No abstract text available
    Text: H D 74A C 14/H D 74A C T14 • H e x Inverter Schmitt Trigger Description The HD74AC14/HD74ACT14 contains six logic in­ verters which accept standard CMOS input signals TTL levels for HD74ACT14 and provide standard CMOS output levels. They are capable of trans­


    OCR Scan
    PDF HD74AC14/HD74ACT14 HD74AC14/HD74ACT14 HD74ACT14) HD74ACT14 Zo transistor h07

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVCH162500 18-bit Universal Bus Transceivers with 3-state Outputs HITACHI ADE-205-181 Z Preliminary, 1st. Edition December 1996 Description Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the


    OCR Scan
    PDF HD74ALVCH162500 18-bit ADE-205-181 HD74ALV CH162500 TTP-56D

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVCH162836 20-bit Universal Bus Driver with 3-state Outputs HITACHI ADE-205-211 Z Preliminary, 1st. Edition January 1998 Description This 20-bit universal bus driver is designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by the output enable (OE) input. The device operates in the


    OCR Scan
    PDF HD74ALVCH162836 20-bit ADE-205-211 HD74ALV CH162836 TTP-56D

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVCH16721 3.3-V 20-bit Flip Flops with 3-state Outputs HITACHI ADE-205-139 Z Preliminary 1st. Edition May 1996 Description The HD74ALVCH1672rs twenty flip flops are edge triggered D-type flip flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs,


    OCR Scan
    PDF HD74ALVCH16721 20-bit ADE-205-139 HD74ALVCH1672rs HD74ALV CH16721 TTP-56D

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVCH16373 16-bit Transparent D-type Latches with 3-state Outputs HITACHI ADE-205-138 Z Preliminary 1st. Edition May 1996 Description The HD74ALVCH16373 is particularly suitable for implementing buffer registers, I/O ports, bi-directional bus drivers, and working registers. It can be used as two 8-bit latches or one 16-bit latch. When the latch


    OCR Scan
    PDF HD74ALVCH16373 16-bit ADE-205-138 HD74ALVCH16373 HD74ALV CH16373 TTP-48DC

    Untitled

    Abstract: No abstract text available
    Text: HD74ALVCH16827 20-bit Buffers / Drivers with 3-state Outputs HITACHI ADE-205-140A Z 2nd. Edition September 1997 Description The HD74ALVCH16827 is composed of two 10-bit sections with separated output enable signals. For either 10-bit buffer section, the two output enable (lO E l and 10E 2 or 20E 1 and 20E 2) inputs must both


    OCR Scan
    PDF HD74ALVCH16827 20-bit ADE-205-140A HD74ALVCH16827 10-bit D-85622