E PLAN
Abstract: No abstract text available
Text: HY63V8100AS/HY63V81OOAL -HYUNDAI 128Kx8bit CMOS FAST SRAM PRELIMINARY DESCRIPTION The HY63V8100A is a 1,048,576-bit high-speed Static Random Access Memory organized as 131,072 words by 8-bits. The HY63V8100A uses eight common input and output lines and has an output enable pin
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HY63V8100AS/HY63V81OOAL
128Kx8bit
HY63V8100A
576-bit
20/25/30ns
HY63V8100AS
HY63V8100AL
32pin
E PLAN
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Untitled
Abstract: No abstract text available
Text: mV Y "fi I II II il A U R U I H Y 6 3 V 8 1 0 0 A S /H Y 6 3 V 8 1 O O A L 128K X 8 B it I l l FAST SRAM PRELIMINARY DESCRIPTION The HY63V8100 is a 1,048,576 -bits high-speed Static Random Access Memory organized as 131,072 words by 8 bits. The HY63V8100 uses eight common input and output lines and has an output enable pin which operates
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OCR Scan
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HY63V8100
20/25/30ns
-HY63V8100AS
100mA
0JJ12)
1DG03-22-MA
HY63V8100A
HY63V8100AJ
HY63V8100ALJ
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1DG03-22-MAY95
Abstract: No abstract text available
Text: “ H Y U N D A I H Y 6 3 V 8 1 0 0 A S / H Y 6 3 V 8 1 O O A L 128K X 8 Bit FAST SRAM PRELIMINARY DESCRIPTION The HY63V8100 is a 1,048,576 -bits high-speed Static Random A ccess Memory organized as, 131,072 words by 8 bits. The HY63V8100 uses eight common input and output lines and has an output enable p ir which operates
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OCR Scan
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HY63V8100
20/25/30ns
-HY63V8100AS
100mA
Stand0120
025J0
1DG03-22-MA
HY63V8100A
HY63V8100AJ
1DG03-22-MAY95
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