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    sem 2106

    Abstract: SR5690 Northbridge Southbridge PCIe Bridge RD890 5650 ati ACC MICRO 2178 Index
    Text: AMD SR5690/5670/5650 Register Reference Guide Publication # 43871 Issue Date: May 2012 Revision: 3.03 Trademarks AMD, the AMD Arrow logo, ATI, and combinations thereof, are trademarks of Advanced Micro Devices, Inc. HyperTransport is a licensed trademark of the HyperTransport Technology Consortium.


    Original     		SR5690/5670/5650 sem 2106 SR5690 Northbridge Southbridge PCIe Bridge RD890 5650 ati ACC MICRO 2178 Index PDF

    MIPS64

    Abstract: "network interface cards"
    Text: RM9120 Preliminary FEATURES AM RM9120 Integrated Microprocessor NETWORKING INTERFACES • A CPU core compatible with the MIPS64 Instruction Set Architecture. • High-speed integrated DDR SDRAM, SysAD, Local Bus, HyperTransport, and Ethernet MAC interfaces. Option


    Original     		RM9120 RM9120 MIPS64TM 672-pin PMC-2031705 MIPS64 "network interface cards" PDF

    HT66

    Abstract: RS680 tu smb
    Text: CY28RS680 Clock Generator for ATI RS5XX/6XX Chipsets Features • 48 MHz USB clock • 66 MHz HyperTransport clock • Supports AMD® CPU • I2C support with readback capabilities • Selectable CPU frequencies • 200 MHz differential CPU clock pairs 25% over/ 50%


    Original     		CY28RS680 over/10% 64-pin HTT66 CY28RS680ZXC CY28RS680ZXCT 64-Lead MO-153 HT66 RS680 tu smb PDF

    Transistor Substitution Data Book 1993

    Abstract: introduction to vlsi CS9222 XD1000 AMD64 EP2S180 WP-01035-1 require-40
    Text: White Paper Implementation of the Smith-Waterman Algorithm on a Reconfigurable Supercomputing Platform Abstract An innovative reconfigurable supercomputing platform—XD1000—is being developed by XtremeData to exploit the rapid progress of FPGA technology and the high performance of HyperTransport interconnection. In this paper, we


    Original     		platform--XD1000--is XD1000 Transistor Substitution Data Book 1993 introduction to vlsi CS9222 AMD64 EP2S180 WP-01035-1 require-40 PDF

    TI2050

    Abstract: Bridges tsi310
    Text: MyTundra: Log In Search | Home> Products> PCI/X Bridges> Tsi350A > Features Products Technology News + Host Bridges ZTE Selects Tundra's PCI Express Product for Next Generation Platform August 27, 2008 + HyperTransport Bridges + PCI Express Bridges Tundra Introduces Mulit- Standard


    Original     		Tsi350A Tsi352 Tsi350A Tsi340 Tsi310 208-pin TI2050 -66CQ TI2050 Bridges tsi310 PDF

    mcp55 pro

    Abstract: PDB-PT815-CN20 ami 9071 mcp55 nvidia mcp55 uPD720400 BPN-SAS-815T ATI ES1000 Graphics Controller DDR2 SDRAM DIMM cse-815
    Text: Hom e Conta ct Us Adva nce d Se arch Search A+ Server 1021M-T2RV / 1021M-T2RB Products Systems 1U [ 1021M-T2RV / 1021M-T2RB ] Integrated Board Key Features 1. Tw o Quad-Core / Dual-Core AMD Opteron 2000 Series Socket F Support, 1000 MHz HyperTransport Link


    Original     		1021M-T2RV 1021M-T2RB 64-bit 133MHz MCP55 AS-1021M-T2RV mcp55 pro PDB-PT815-CN20 ami 9071 nvidia mcp55 uPD720400 BPN-SAS-815T ATI ES1000 Graphics Controller DDR2 SDRAM DIMM cse-815 PDF

    IPMI

    Abstract: mcp55 pro H8SMI-2 H8SMI-2 CSE-811FT-260 AS-1011M-T2 v201u 0052L 1011m
    Text: Search A+ Server 1011M-T2 / 1011M-T2B A+ Products Systems 1U [ 1011M-T2 / 1011M-T2B ] Integrated Board Key Features 1. Single Quad-Core/Dual-Core AMD Opteron 1000 Series Socket AM2 support, 1000MHz HyperTransport Link 2. Up to 8GB DDR2 800/667/533 SDRAM


    Original     		1011M-T2 1011M-T2B 1000MHz AS-1011M-T2 AS-1011M-T2B 940-pin IPMI mcp55 pro H8SMI-2 H8SMI-2 CSE-811FT-260 v201u 0052L 1011m PDF

    Untitled

    Abstract: No abstract text available
    Text: HyperTransport MegaCore Function Errata Sheet December 2006, MegaCore Version 6.1 This document addresses known errata and documentation issues for the HyperTransport MegaCore function version 6.1. Errata are functional defects or errors, which may cause the HyperTransport MegaCore


    Original     		PDF

    hypertransport

    Abstract: No abstract text available
    Text: HyperTransport MegaCore Function Errata Sheet May 2007, MegaCore Version 7.1 This document addresses known errata and documentation issues for the HyperTransport MegaCore function version 7.1. Errata are functional defects or errors, which may cause the HyperTransport MegaCore


    Original     		ES-HTP003-1 hypertransport PDF

    OZ9956

    Abstract: SB700 RS780M RX781 cmc tpm 16 cmc tp16 ATI rs780 RX780 AZ1117H-ADJTRE1 oz99
    Text: 4 3 AMD S1G2 PROCESSOR HT3 2600Mhz 5.2GT/s 16x16 RTL8111B PCIE ETHERNET 26 Express CARD PCIE I/F USB1 MINI-PCIE 28 X16 PEIE I/F HyperTransport LINK3 CPU I/F MXM Socket type III ATI M88 VGA CON PCIE I/F 1 X16 PCIE GFX I/F USB0 MINI-PCIE 28 D 200-PIN DDR2 SODIMM


    Original     		638-Pin 2600Mhz 16x16 800MT/S 200-PIN CS9LPRS472 RTL8111B RX780 OZ9956 SB700 RS780M RX781 cmc tpm 16 cmc tp16 ATI rs780 RX780 AZ1117H-ADJTRE1 oz99 PDF

    rtm870t

    Abstract: RTM870T-690 9LPR462 rtm870 SRN22J-4-GP ICS9LPR462 foxconn rs690mc Socket AM2 GPIO57
    Text: 5 4 3 2 1 Yukon Block Diagram AMD 8,9 DDR2 SODIMM DIMM2 K8 Rev.G AM2 Socket DDR II 533/667/800 8,9 HyperTransport 16x16 32 4,5, 6,7 L1: Signal 1 L2: VCC L3: Inner Signal 2 L4: Inner Signal 3 L5: GND L6: Signal 4 Project code: 91.4BC01.001 PCB P/N : 48.4BC01.001


    Original     		16x16 4BC01 9LPR462 RTM870T-690) 318MHz 11a/b/g/n Marvell8040 25MHz RS690MC rtm870t RTM870T-690 9LPR462 rtm870 SRN22J-4-GP ICS9LPR462 foxconn rs690mc Socket AM2 GPIO57 PDF

    C2P1

    Abstract: foxconn VT1617A VT1617 VIA vt8237 DY-SE220U2VDM-6 WISTRON power sequence HP connectors Wistron Corporation Wistron Corporation Egret
    Text: A B C D E EGRET Block Diagram 200-PIN DDR SODIMM CLK GEN ICS ICS950405 4 AMD CPU DDR 3 33/400 DDR x2 Claw Hammer K8 PCB Layer Stackup 8,9,10 3 L1: Signal 1 L2: GND L3: Signal 2 L4: Signal 3 L5: VCC L6: Signal 4 4,5,6,7 TV Encoder VIA VT1623M HyperTransport


    Original     		200-PIN ICS950405 16b/8b TPS2224AP VT1623M K8N800 VT1631 MAX1645BEEI 66MHZ C2P1 foxconn VT1617A VT1617 VIA vt8237 DY-SE220U2VDM-6 WISTRON power sequence HP connectors Wistron Corporation Wistron Corporation Egret PDF

    SLB9635TT1.2

    Abstract: SW2801 SW2800 alc882 ci685 MS-10581 ci740 AMD Athlon 64 X2 4800 pin diagram socket s1 SLB9635TT1
    Text: 4 3 AMD S1 PROCESSOR 638-Pin uFCPGA 638 EXTERNAL CLOCK GENERATOR HyperTransport LINK0 16 LVDS CON LVDS 15 1 UNBUFFERED DDR2 NEAR SODIMM 9,10 DDR II 400/533/667 5,6,7,8 200-PIN DDR2 SODIMM IN ICS951462 D 2 OUT 5 D 16x16 UNBUFFERED DDR2 FAR SODIMM ATI NB - RSRS485M


    Original     		638-Pin 16x16 200-PIN ICS951462 RSRS485M RTL8111B CI808 CI809 CI810 SLB9635TT1.2 SW2801 SW2800 alc882 ci685 MS-10581 ci740 AMD Athlon 64 X2 4800 pin diagram socket s1 SLB9635TT1 PDF

    c5129

    Abstract: C5149 C5148 88E8001 CPUTEST29H D4203 D4004 u6202 R6130 R6503
    Text: 5 4 3 2 A6M 1 REVISION: 2.0 128-BIT AMD S1g1 D Unbuffer DDR2 SO-DIMM Channel A/B x16 HyperTransport 200/400/800 MHz 638 PIN PACKAGE LVDS nVIDIA Gigabit Ethernet RTL8111B PCI-E x1 CRT C51MV C TV OUT X8 /X4 HyperTransport 200/400/800 MHz BGA 468 PCMCIA 33MHz


    Original     		USB/AC97/SMB 1394/SD ALC880 RJ45/11/MDC PIC16F54C MAX8725 TPC8107 Page19, Page38, R3811 c5129 C5149 C5148 88E8001 CPUTEST29H D4203 D4004 u6202 R6130 R6503 PDF

    nec tokin oe 128

    Abstract: MS-17171 MCP51M NEC Tokin od 108 c113 pc 100 3p3 nvidia c51mv PC017 MS17171 Athlon Neo X2 CM1616
    Text: 5 4 3 MS-17171 Ver : 2.0 2 Processor 1 DDR2 Sodimm 0 AMD S1 638 pin uFCPGA 638 socket Battery Charger Page 6 DDR2 400 / 533 / 667 MHz Page 31 DDR2 Sodimm 1 Page 2,3,4,5 Battery select Page 6 Page 32 D D 16 X 16 Bit HyperTransport Link DRAM Power Page 33 North Bridge


    Original     		MS-17171 C51MV RTL8111B 6855B Sou110 E43-1204002-H29 E2P-7170111-G40 E26-1004050-SA6 E26-1035130-G40 E2P-6322713-G40 nec tokin oe 128 MCP51M NEC Tokin od 108 c113 pc 100 3p3 nvidia c51mv PC017 MS17171 Athlon Neo X2 CM1616 PDF

    ics 951462

    Abstract: ICS951462 ICS951462yGLFT SB600 amd SB600 B20B RS680
    Text: ICS951462 Integrated Circuit Systems, Inc. Programmable System Clock Chip for ATI RS/RD690 - K8TM based Systems Output Features: • 2 - pairs of CPU pairs • 8 - pairs of SRC pairs • 4 - pairs of ATIG pairs • 1 - HyperTransport 66MHz clock seed • 2 - 48MHz USB clock


    Original     		ICS951462 RS/RD690 66MHz 48MHz 318MHz 125ps 300ppm SB600 ics 951462 ICS951462 ICS951462yGLFT amd SB600 B20B RS680 PDF

    LEXMARK

    Abstract: CY28331 HT66 PCI33
    Text: CY28331 Clock Generator for AMD Hammer Features Table 1. Frequency Table MHz [1] FS (3:0) PCI_HT SEL 0000 X • One free-running PCI clock 0001 0/1 • Four low-skew/low-jitter PCI/HyperTransport™ clocks 0010 • One 48M output for USB 0011 • One programmable 24M or 48M for FDC


    Original     		CY28331 318-MHz 16mber: LEXMARK CY28331 HT66 PCI33 PDF

    Untitled

    Abstract: No abstract text available
    Text: ICS951416 Integrated Circuit Systems, Inc. System Clock Chip for ATI RS480 Output Features: • 3 - 14.318 MHz REF clocks • 1 - USB_48MHz USB clock • 1 - HyperTransport 66 MHz clock seed • 1 - PCI 33 MHz clock seed • 2 - Pairs of AMD K8 clocks •


    Original     		ICS951416 RS480 RS480 48MHz VDD48 SRCCLKC716y 0937G--04/29/05 PDF

    ICS951416

    Abstract: RS480 HT66 PCI33
    Text: ICS951416 Integrated Circuit Systems, Inc. System Clock Chip for ATI RS480 Output Features: • 3 - 14.318 MHz REF clocks • 1 - USB_48MHz USB clock • 1 - HyperTransport 66 MHz clock seed • 1 - PCI 33 MHz clock seed • 2 - Pairs of AMD K8 clocks •


    Original     		ICS951416 RS480 48MHz VDD48 48MHz 0937H--05/26/05 ICS951416 RS480 HT66 PCI33 PDF

    AS90L10204

    Abstract: No abstract text available
    Text: AS90L10204 January 2004 Press Release HyperTransport-to-PCI/PCI-X Bridge Overview The AS90L10204 is a high performance third generation HyperTransport -to-PCI/PCI-X bridge capable of tunneling the data between the two HT ports or transferring the data between


    Original     		AS90L10204 AS90L10204 PDF

    ICS951416

    Abstract: 5744 HT66 PCI33 RS480
    Text: ICS951416 Integrated Circuit Systems, Inc. System Clock Chip for ATI RS480 Output Features: • 3 - 14.318 MHz REF clocks • 1 - USB_48MHz USB clock • 1 - HyperTransport 66 MHz clock seed • 1 - PCI 33 MHz clock seed • 2 - Pairs of AMD K8 clocks •


    Original     		ICS951416 RS480 48MHz VDD48 48MHz MO-153 ICS951416yGLFT 0937E--12/08/04 ICS951416 5744 HT66 PCI33 RS480 PDF

    Untitled

    Abstract: No abstract text available
    Text: HT-2000 HYPERTRANSPORT SYSTEMI/O™ CONTROLLER SUMMARY OF BENEFITS FEATURES • The HT-2000 integrates: • • • • • Dual Broadcom BCM5714 GbE controller • 17 PCI-E links with support for up to four controllers • Full PCI-X 1.0 compliance with up to five bus masters


    Original     		HT-2000 HT-2000 BCM5714 HT-2000-PB01-R PDF

    software requrement specification

    Abstract: AN320 DW10 EP1S60F1020C6 PDN0906
    Text: HyperTransport MegaCore Function User Guide c The IP described in this document is scheduled for product obsolescence and discontinued support as described in PDN0906. Therefore, Altera does not recommend use of this IP in new designs. For more information about Altera’s


    Original     		PDN0906. software requrement specification AN320 DW10 EP1S60F1020C6 PDN0906 PDF

    tsi301

    Abstract: hypertransport
    Text: Tsi301 HyperTransport-to-PCI Bridge Features HyperTransport Interfaces • Two bidirectional 8-bit HyperTransport interfaces – Up to 400MHz DDR Double Data Rate for peak bandwidth of 800 MB/s simultaneously in each direction • Supports both HyperTransport 1.0 Interface


    Original     		Tsi301TM 400MHz Tsi301 80D3000 com/Tsi301 hypertransport PDF