Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L I n t e g r a te d D e v iz e T e c h n o lo g y , l i e . FEATURES: more using the M aster/Slave select when cascading more than one d evice • M/S = H for BUSY output flag on Master, M/S = L for BUSY input on Slave

16kx8 static ram ttl

Abstract: 2640I 08ND
Contextual Info: jg r -f HIGH-SPEED 32Kx 8 DUAL-PORT STATIC RAM PRELIMINARY IDT7007S/L In te g ra te d D evice T echnology, Inc. FEATURES: • IDT7007 easily expands data bus width to 16 bits or more using the Master/Slave select when cascading more than one device • M/S= H for BUSY output flag on Master

SEM 2006

Abstract: 7007S IDT CODE DATE TOP SIDE package marking FORMAT A12L A13L A14L IDT7007 IDT7007L IDT7007S MARKING A1L
Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Features ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Military: 25/35/55ns max. – Industrial: 20/25/35/55ns (max.) – Commercial: 15/20/25/35/55ns (max.)

SL265

Abstract: l0629
Contextual Info: HIGH-SPEED 32K X 8 DUAL-PORT STATIC RAM PRELIMINARY IDT7007S/L Integrated Device Technology, Inc FEATURES: m ore using the M a ste r/S lav e s elect w h en cascading m ore than one d e v ice • True D ual-P orted m em ory cells which allow sim ulta­ neous reads of the s am e m em ory location

7007S

Abstract: A12L A13L A14L IDT7007 IDT7007L IDT7007S
Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Features ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Military: 25/35/55ns max. – Industrial: 20/25/35/55ns (max.) – Commercial: 15/20/25/35/55ns (max.)

A12L

Abstract: A13L A14L IDT7007 IDT7007L IDT7007S IDT7007J
Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Features ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Military: 25/35/55ns max. – Industrial: 55ns (max.) – Commercial: 15/20/25/35/55ns (max.)

7007S

Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Featu res * * * True Dual-Ported memory cells which allow simultaneous using the Master/Slave select when cascading more than reads of the same memory location one d e v ic e _ High-speed access M/S = H for BUSY output flag on Master,

7007S

Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Features ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Military: 25/35/55ns max. – Industrial: 20/25/35/55ns (max.) – Commercial: 15/20/25/35/55ns (max.)

7007S

Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Features ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Military: 25/35/55ns max. – Industrial: 20/25/35/55ns (max.) – Commercial: 15/20/25/35/55ns (max.)

Contextual Info: 11S8>s\i jdt HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Integrated Device Technology, Inc. FEATURES: • True Dual-Ported memory cells which allow simulta­ neous reads of the same memory location • High-speed access — Military: 25/35/55ns max.)

7007S

Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Features * * True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access - Military: 25135155ns max. - Industrial: 55ns (max.) Commercial: 15/20/25/35/55ns(max.)

Contextual Info: IDT7007S25PF 1/2 IL08 C-MOS 256 K (32,768 x 8)-BIT DUAL-PORT SRAM NC NC NC NC NC NC 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VDD GND NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 NC VDD VDD NC GND GND NC NC 61 62 63 64 65

"32K x 8" dual port SRAM PLCC

Abstract: A12L A13L A14L IDT7007 IDT7007L IDT7007S
Contextual Info: IDT7007S/L HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM Integrated Device Technology, Inc. more than one device • M/S = H for BUSY output flag on Master, M/S = L for BUSY input on Slave • Busy and Interrupt Flags • On-chip port arbitration logic • Full on-chip hardware support of semaphore signaling

Contextual Info: böE D • MflSS7?l 0 Ü 1 M 1S 7 3TÖ ■ IDT I N T E G R A T E D DEVIC E HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM PRELIMINARY IDT7007S/L Integrated Device Technology. Inc FEATURES: • True Dual-Ported m em ory cells w hich allow sim ulta­ neous reads of the sam e m em ory location

7007S

Abstract: IDT7007 A12L A13L A14L IDT7007L IDT7007S IDT TOP SIDE package marking FORMAT
Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Features ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Military: 25/35/55ns max. – Industrial: 20/25/35/55ns (max.) – Commercial: 15/20/25/35/55ns (max.)

Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L In te g ra ted D e v iz e T e c h n o lo g y , l i e . FEATURES: • True Dual-Ported m em ory cells which allow sim ulta­ neous reads of the sam e m em ory location • H igh-speed access — M ilitary: 25/35/55ns max.

"32K x 8" dual port SRAM PLCC

Abstract: A12L A13L A14L IDT7007 IDT7007L IDT7007S
Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Integrated Device Technology, Inc. FEATURES: • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • High-speed access — Military: 25/35/55ns max. — Commercial: 20/25/35/55ns (max.)

Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM jdt IDT7007S/L In tegrated D e\ dee T ech nology, Inc. FEATURES: more than one device • M/S = H for BUSY output flag on Master, M/S = L for BUSY input on Slave • Busy and Interrupt Flags • On-chip port arbitration logic

A12L

Abstract: A13L A14L IDT7007 IDT7007L IDT7007S
Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Integrated Device Technology, Inc. FEATURES: • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • High-speed access — Military: 25/35/55ns max. — Industrial: 55ns (max.)

Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Integrated Device Technology, Inc. FEATURES: • True Dual-Ported memory cells which allow simulta­ neous reads of the same memory location • High-speed access — Military: 25/35/55ns max. — Industrial: 55ns (max.)

Contextual Info: \y HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Integrated Devi ce Technology, Inc. FEATURES: more using the Master/Slave select when cascading more than one device M/S = H for BUSY output flag on Master, M/S = L for BUSY input on Slave Interrupt Flag

3EML

Abstract: 3EM2
Contextual Info: jg r -f HIGH-SPEED 32Kx 8 DUAL-PORT STATIC RAM PRELIMINARY IDT7007S/L In te g ra te d D evice T echnology, Inc. FEATURES: • IDT7007 easily expands data bus width to 16 bits or more using the Master/Slave select when cascading more than one device • M/S= H for BUSY output flag on Master

A12L

Abstract: A13L A14L IDT7007 IDT7007L IDT7007S
Contextual Info: HIGH-SPEED 32K x 8 DUAL-PORT STATIC RAM IDT7007S/L Integrated Device Technology, Inc. FEATURES: • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • High-speed access — Military: 25/35/55ns max. — Commercial: 20/25/35/55ns (max.)

4900GC

Abstract: IDT72V36110L7-5PFG IDT72V36110L7-5PFGI IDT70261L20PFGI IDT7025S25PFG8 IDT70V06L20PFGI8 IDT7133SA35PF8 IDT70V28L20PFGI IDT72V255LA15PFGI IDT72285L10PFG
Contextual Info: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: A0811-02 DATE: 9-Jan-2009 Product Affected: TQFP 64, TQFP 80, TQFP 100, TQFP 128, (Standard and RoHS) Refer to Attachment II for the affected part numbers