RT3PE600L
Abstract: RT3PE3000L AES-128 PAC10 LG484 ProASICPLUS Flash Family FPGAs Advanced v0.1
Text: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging
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MIL-STD-883
RT3PE600L
RT3PE3000L
AES-128
PAC10
LG484
ProASICPLUS Flash Family FPGAs Advanced v0.1
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Advanced Boot Block Flash
Abstract: AES-128 CS201 CS281 CS289 AGLP125
Text: v1.5 IGLOO PLUS Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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130-nm,
Advanced Boot Block Flash
AES-128
CS201
CS281
CS289
AGLP125
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A3P600
Abstract: A3P060 A3P1000 A3P125 A3P250 AECQ100 AEC-Q100 FG144 FG256 FG484
Text: v1.0 Automotive ProASIC3 Flash Family FPGAs Features and Benefits Low Power • 1.5 V Core Voltage • Support for 1.5-V-Only Systems • Low-Impedance Flash Switches High-Temperature AEC-Q100–Qualified Devices • Grade 2 105°C TA 115°C TJ • Grade 1 125°C TA (135°C TJ)
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AEC-Q100
A3P600
A3P060
A3P1000
A3P125
A3P250
AECQ100
FG144
FG256
FG484
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A3PE1500
Abstract: A3PE3000 IO23PDB0V2 IO23NDB0V2 IO30PDB1V1 IO05PDB0V0 IO06PDB0V1 IO32PDB1V1 IO10PDB0V1 IO283PDB7V1
Text: ProASIC3E Packaging 3 – Package Pin Assignments 208-Pin PQFP 1 208 208-Pin PQFP Note: This is the top view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .
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208-Pin
A3PE600
IO112PDB6V1
IO85NPB5V0
A3PE1500
A3PE3000
IO23PDB0V2
IO23NDB0V2
IO30PDB1V1
IO05PDB0V0
IO06PDB0V1
IO32PDB1V1
IO10PDB0V1
IO283PDB7V1
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A3PE3000L FG484
Abstract: Actel pdf on radio emitter A3PE3000L FG144 FG256 FG324 FG484 PQ208 TDP 245 Y
Text: v1.3 ProASIC3L Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • Dramatic Reduction in Dynamic and Static Power Savings • 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power • Low Power Consumption in Flash*Freeze Mode Allows for
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Original
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PDF
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130-nm,
A3PE3000L FG484
Actel pdf on radio emitter
A3PE3000L
FG144
FG256
FG324
FG484
PQ208
TDP 245 Y
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A3P250
Abstract: A3P060 A3P1000 Datasheet A3P125 IO97RSB2 IO52NDB1 FBGA A3P250 fbga 256 A3P250 ACTEL ACTEL FBGA 144
Text: Automotive ProASIC3 Packaging 3 – Package Pin Assignments 100-Pin VQFP 100 1 Note: This is the top view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .
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100-Pin
A3P060
IO62RSB1
IO31RSB0
GAA2/IO51RSB1
A3P250
A3P1000
Datasheet A3P125
IO97RSB2
IO52NDB1
FBGA A3P250
fbga 256
A3P250 ACTEL
ACTEL FBGA 144
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729-Pin
Abstract: Axcelerator FPGAs AX125 IO126PB3F11 AG18 FBGA 896 896-Pin Axcelerator Family FPGAs
Text: Axcelerator Family FPGAs Package Pin Assignments 180-Pin CSP A1 Ball Pad Corner 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A B C D E F G H J K L M N P Figure 3-1 • 180-Pin CSP Bottom View Note For Package Manufacturing and Environmental information, visit Resource center at
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180-Pin
AX125
IO32NB3F3
IO59NB5F5
729-Pin
Axcelerator FPGAs
IO126PB3F11
AG18
FBGA 896
896-Pin
Axcelerator Family FPGAs
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Untitled
Abstract: No abstract text available
Text: Revision 22 IGLOO Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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AES-128
Abstract: FG256 FG484
Text: v2.0 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power
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Original
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PDF
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130-nm,
AES-128
FG256
FG484
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Untitled
Abstract: No abstract text available
Text: Revision 15 ProASIC3 Flash Family FPGAs with Optional Soft ARM Support Features and Benefits Advanced I/O High Capacity • 15 K to 1 M System Gates • Up to 144 Kbits of True Dual-Port SRAM • Up to 300 User I/Os Reprogrammable Flash Technology • 130-nm, 7-Layer Metal 6 Copper , Flash-Based CMOS
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130-nm,
64-Bit
128-Bit
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ARMv6
Abstract: cortex a15 core Cortex-m1 Cortex R4 TRANSISTOR ww1 AES-128 FG256 FG484 T8 851
Text: v1.2 IGLOOe Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology Enables Ultra-Low Power
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130-nm,
ARMv6
cortex a15 core
Cortex-m1
Cortex R4
TRANSISTOR ww1
AES-128
FG256
FG484
T8 851
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IO140
Abstract: ic 7483 block diagram SH41 3181 S64 OM140 st 439 PCF8801 PCF8801U S140 2SH32
Text: INTEGRATED CIRCUITS DATA SHEET PCF8801 LCD driver for 140 x 2 segments Product specification File under Integrated Circuits, IC12 2000 Feb 04 Philips Semiconductors Product specification LCD driver for 140 × 2 segments PCF8801 The chip can easily be cascaded for larger LCD
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PCF8801
PCF8801
280-bit
40-segment
465006/01/pp20
IO140
ic 7483 block diagram
SH41
3181 S64
OM140
st 439
PCF8801U
S140
2SH32
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CPLD
Abstract: CS-289
Text: Revision 14 IGLOO PLUS Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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TQFP144 DIMENSION
Abstract: ST70134 ST70235A STLC60135 TQFP144 ifft transmitter IP113 scrambler solomon
Text: ST70235A ASCOTTM DMT TRANSCEIVER PRELIMINARY DATA • DMT MODEM FOR CPE ADSL, COMPATIBLE WITH THE FOLLOWING STANDARDS: - ANSI T1.413 ISSUE 2 - ITU-T G.992.1 G.DMT - ITU-T G.992.2 (G.LITE) ■ SUPPORTS EITHER ATM (UTOPIA LEVEL 1 & 2) OR BITSTREAM INTERFACE
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ST70235A
ST70235A
TQFP144 DIMENSION
ST70134
STLC60135
TQFP144
ifft transmitter
IP113
scrambler solomon
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epson smd floppy
Abstract: ir3e203 4046 analog IC smd A9A smd diode g5 zener smd T4C S1D13706 S1D13A03 db-15 pin connector vga adapter X37A-A-001-xx
Text: S1D13A03 LCD/USB Companion Chip S1D13A03 TECHNICAL MANUAL Document Number: X36A-Q-001-01 Copyright 2001 Epson Research and Development, Inc. All Rights Reserved. Information in this document is subject to change without notice. You may download and use this document, but only for your own use in
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S1D13A03
S1D13A03
X36A-Q-001-01
SA-1110
X36A-G-013-02
epson smd floppy
ir3e203
4046 analog IC
smd A9A
smd diode g5 zener
smd T4C
S1D13706
db-15 pin connector vga adapter
X37A-A-001-xx
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ProASIC3 Flash Family
Abstract: No abstract text available
Text: Revision 5 Automotive ProASIC3 Flash Family FPGAs Features and Benefits Low Power • 1.5 V Core Voltage • Support for 1.5-V-Only Systems • Low-Impedance Flash Switches Extended Temperature AEC-Q100–Qualified Devices • Grade 2: –40°C to 105°C TA 115°C TJ
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AEC-Q100
ProASIC3 Flash Family
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AES-128
Abstract: FG256 FG484 ARMv6
Text: Revision 8 IGLOOe Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze
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Original
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PDF
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130-nm,
AES-128
FG256
FG484
ARMv6
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RT3PE3000
Abstract: RT3PE600L RT3PE3000L CCGA AES-128 PAC10 IO72NDB4V0
Text: Advance v0.1 Radiation-Tolerant ProASIC3 Low-Power SpaceFlight Flash FPGAs with Flash*Freeze Technology Features and Benefits • High-Performance, Low-Skew Global Network • Architecture Supports Ultra-High Utilization MIL-STD-883 Class B Qualified Packaging
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Original
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PDF
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MIL-STD-883
RT3PE3000
RT3PE600L
RT3PE3000L
CCGA
AES-128
PAC10
IO72NDB4V0
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A3PE600
Abstract: No abstract text available
Text: v1.0 ProASIC3E Flash Family FPGAs with Optional Soft ARM® Support Features and Benefits High Capacity • 600 k to 3 Million System Gates • 108 to 504 kbits of True Dual-Port SRAM • Up to 620 User I/Os Reprogrammable Flash Technology • • • •
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PDF
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130-nm,
64-Bit
128-Bit
A3PE600
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LGA 478 SOCKET PIN LAYOUT
Abstract: RTAX2000
Text: v5.2 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg
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TM1019
LGA 478 SOCKET PIN LAYOUT
RTAX2000
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Untitled
Abstract: No abstract text available
Text: ProASIC 3 Datasheet P ro du c t Br ie f 1 – ProASIC®3 Flash Family FPGAs with Optional Soft ARM® Support Features and Benefits • • • • • 30 k to 1 Million System Gates Up to 144 kbits of True Dual-Port SRAM Up to 300 User I/Os Reprogrammable Flash Technology
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Original
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PDF
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130-nm,
64-Bit
A3P030)
128-Bit
A3P030
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Untitled
Abstract: No abstract text available
Text: v1.0 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V or 1.5 V Core and I/O Voltage for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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Original
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AGL250
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1100 847 e11
Abstract: c 1383
Text: v1.0 Automotive ProASIC3 Flash Family FPGAs Features and Benefits Low Power • 1.5 V Core Voltage • Support for 1.5-V-Only Systems • Low-Impedance Flash Switches High-Temperature AEC-Q100–Qualified Devices • Grade 2 105°C TA 115°C TJ • Grade 1 125°C TA (135°C TJ)
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PDF
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AEC-Q100
1100 847 e11
c 1383
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peak china qfn 9 x 9 tray drawing
Abstract: semi catalog AGL1000-FG484
Text: IGLOO Handbook IGLOO Handbook Table of Contents Low-Power Flash Device Handbooks Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Section I – IGLOO Datasheet IGLOO Low-Power Flash FPGAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
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