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    JEDEC PC3200 TIMINGS Search Results

    JEDEC PC3200 TIMINGS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    AM27S25DM Rochester Electronics LLC AM27S25 - OTP ROM Visit Rochester Electronics LLC Buy
    9513ASP Rochester Electronics LLC System Timing Controller Visit Rochester Electronics LLC Buy
    AM9513AJC-G Rochester Electronics LLC 9513A - System Timing Controller Visit Rochester Electronics LLC Buy
    ICM7170AIDG Rochester Electronics LLC ICM7170 - Real Time Clock, CMOS Visit Rochester Electronics LLC Buy
    AM27C256-70PI Rochester Electronics LLC AM27C256 - 256Kb (32K x 8-Bit) CMOS OTP EPROM Visit Rochester Electronics LLC Buy

    JEDEC PC3200 TIMINGS Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    SSTV16857

    Abstract: CY2SSTV16857 CY2SSTV16857ZC CY2SSTV16857ZCT CY2SSTV16857ZI JESD78 PC3200
    Text: CY2SSTV16857 14-Bit Registered Buffer PC2700-/PC3200-Compliant Features • Differential Clock Inputs up to 280 MHz • Supports LVTTL switching levels on the RESET pin • Output drivers have controlled edge rates, so no external resistors are required • Two KV ESD protection


    Original     		CY2SSTV16857 14-Bit PC2700-/PC3200-Compliant JESD78, JESD82-3) 48-pin SSTV16857 CY2SSTV16857 CY2SSTV16857ZC CY2SSTV16857ZCT CY2SSTV16857ZI JESD78 PC3200 PDF

    SSTV16857

    Abstract: CY2SSTV16857ZI JESD78 PC3200 CY2SSTV16857 CY2SSTV16857ZC CY2SSTV16857ZCT PC3200-Compliant
    Text: CY2SSTV16857 14-Bit Registered Buffer PC2700-/PC3200-Compliant Features • Differential Clock Inputs up to 280 MHz • Supports LVTTL switching levels on the RESET pin • Output drivers have controlled edge rates, so no external resistors are required • Two KV ESD protection


    Original     		CY2SSTV16857 14-Bit PC2700-/PC3200-Compliant JESD78, JESD82-3) 48-pin SSTV16857 PC2700-/PC3200-Compliant" CY2SSTV16857ZI JESD78 PC3200 CY2SSTV16857 CY2SSTV16857ZC CY2SSTV16857ZCT PC3200-Compliant PDF

    SSTV16857

    Abstract: No abstract text available
    Text: CY2SSTV16857 14-Bit Registered Buffer PC2700-/PC3200-Compliant Features • Differential Clock Inputs up to 280 MHz • Supports LVTTL switching levels on the RESET pin • Output drivers have controlled edge rates, so no external resistors are required • Two KV ESD protection


    Original     		CY2SSTV16857 14-Bit PC2700-/PC3200-Compliant JESD78, JESD82-3) 48-pin SSTV16857 PDF

    CY2SSTV16857

    Abstract: CY2SSTV16857ZC CY2SSTV16857ZCT CY2SSTV16857ZI JESD78 PC3200 SSTV16857
    Text: CY2SSTV16857 14-Bit Registered Buffer PC2700-/PC3200-Compliant Features When RESET is LOW, the differential input receivers are disabled, and undriven floating data, clock, and REF voltage inputs are allowed. In addition, when RESET is LOW, all registers are reset and all outputs force to the LOW state. The


    Original     		CY2SSTV16857 14-Bit PC2700-/PC3200-Compliant JESD78, JESD82-3) 48-pin PC2700-/PC3200-Compliant" CY2SSTV16857 CY2SSTV16857ZC CY2SSTV16857ZCT CY2SSTV16857ZI JESD78 PC3200 SSTV16857 PDF

    CY2SSTV16857

    Abstract: CY2SSTV16857ZC CY2SSTV16857ZCT CY2SSTV16857ZI JESD78 PC3200 SSTV16857 jedec PC3200 timings
    Text: CY2SSTV16857 14-Bit Registered Buffer PC2700-/PC3200-Compliant Features When RESET is LOW, the differential input receivers are disabled, and undriven floating data, clock, and REF voltage inputs are allowed. In addition, when RESET is LOW, all registers are reset and all outputs force to the LOW state. The


    Original     		CY2SSTV16857 14-Bit PC2700-/PC3200-Compliant JESD78, JESD82-3) 48-pin PC2700-/PC3200-Compliant" CY2SSTV16857 CY2SSTV16857ZC CY2SSTV16857ZCT CY2SSTV16857ZI JESD78 PC3200 SSTV16857 jedec PC3200 timings PDF

    Untitled

    Abstract: No abstract text available
    Text: V58C2256 804/404/164 SC HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 45 5D 5B 5 6 7 DDR440 DDR400 DDR400 DDR400 DDR333 DDR266 5ns 5ns 7.5ns 7.5ns 7.5ns 7.5ns Clock Cycle Time (tCK2.5) 4.5ns


    Original     		V58C2256 16Mbit DDR440 DDR400 DDR333 DDR266 PDF

    Untitled

    Abstract: No abstract text available
    Text: V58C2256 804/404/164 SG HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 4 45 5D 5B 5 6 7 DDR500 DDR440 DDR400 DDR400 DDR400 DDR333 DDR266 Clock Cycle Time (tCK2) 5ns 5ns 5ns 7.5ns 7.5ns 7.5ns


    Original     		V58C2256 16Mbit DDR500 DDR440 DDR400 DDR333 DDR266 PDF

    Untitled

    Abstract: No abstract text available
    Text: V58C2256 804/404/164 SC HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 5D 5B 5 6 7 DDR400 DDR400 DDR400 DDR333 DDR266 Clock Cycle Time (tCK2) 5 ns 7.5 ns 7.5 ns 7.5 ns 7.5ns Clock Cycle Time (tCK2.5)


    Original     		V58C2256 16Mbit DDR400 DDR333 DDR266 PDF

    BA 5053

    Abstract: No abstract text available
    Text: V58C2256 804/404/164 SC HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 4 45 5D 5B 5 6 7 DDR500 DDR440 DDR400 DDR400 DDR400 DDR333 DDR266 5ns 5ns 5ns 7.5ns 7.5ns 7.5ns 7.5ns Clock Cycle Time (tCK2.5)


    Original     		V58C2256 16Mbit DDR500 DDR440 DDR400 DDR333 DDR266 BA 5053 PDF

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY V58C2256 804/404/164 S HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) MOSEL VITELIC 5 6 7 75 8 DDR400A DDR333B DDR266A DDR266B DDR200 7.5 ns 7.5 ns 7.5ns 10 ns 10 ns Clock Cycle Time (tCK2.5)


    Original     		V58C2256 16Mbit DDR400A DDR333B DDR266A DDR266B DDR200 PDF

    A 14U

    Abstract: DDR200 DDR266A DDR266B DDR333B DDR400 DDR400A PC2100 PC2700 PC3200
    Text: PRELIMINARY V58C2256 804/404/164 S HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) MOSEL VITELIC 5B 5 6 7 75 8 DDR400A DDR400A DDR333B DDR266A DDR266B DDR200 7.5 ns 7.5 ns 7.5 ns 7.5ns 10 ns


    Original     		V58C2256 16Mbit DDR400A DDR333B DDR266A DDR266B DDR200 A 14U DDR200 DDR266A DDR266B DDR333B DDR400 DDR400A PC2100 PC2700 PC3200 PDF

    CL233

    Abstract: G0116 512x16Bit PC3600
    Text: V58C2256 804/404/164 SC HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 4 45 5D 5B 5 6 7 DDR500 DDR440 DDR400 DDR400 DDR400 DDR333 DDR266 Clock Cycle Time (tCK2) 5ns 5ns 5ns 7.5ns 7.5ns 7.5ns


    Original     		V58C2256 16Mbit DDR500 DDR440 DDR400 DDR333 DDR266 CL233 G0116 512x16Bit PC3600 PDF

    TCk100

    Abstract: No abstract text available
    Text: PRELIMINARY V58C2256 804/404/164 S HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) MOSEL VITELIC 5 6 7 75 8 DDR400A DDR333B DDR266A DDR266B DDR200 7.5 ns 7.5 ns 7.5ns 10 ns 10 ns Clock Cycle Time (tCK2.5)


    Original     		V58C2256 16Mbit DDR400A DDR333B DDR266A DDR266B DDR200 TCk100 PDF

    16MX16

    Abstract: No abstract text available
    Text: V58C2256 804/404/164 SC HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 5D 5B 5 6 7 DDR400 DDR400 DDR400 DDR333 DDR266 Clock Cycle Time (tCK2) 5 ns 7.5 ns 7.5 ns 7.5 ns 7.5ns Clock Cycle Time (tCK2.5)


    Original     		V58C2256 16Mbit DDR400 DDR333 DDR266 16MX16 PDF

    B1370

    Abstract: 80554
    Text: Intel 80332 I/O Processor Design Guide August 2004 Order Number: 273824-001 Intel® 80332 I/O Processor Design Guide Contents INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN


    Original     		PDF

    b1370

    Abstract: PCI x1 express PCB dimensions artwork B1370 transistor intel 845 crb intel 915 MOTHERBOARD pcb CIRCUIT diagram b1370 e intel 915 MOTHERBOARD CIRCUIT diagram INTEL 845 MOTHERBOARD CIRCUIT diagram intel 845 MOTHERBOARD pcb CIRCUIT diagram mictor connector layout guideline
    Text: Intel 80333 I/O Processor Design Guide March 2005 Order Number: 305434-001US Intel® 80333 I/O Processor Design Guide Contents INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN


    Original     		305434-001US b1370 PCI x1 express PCB dimensions artwork B1370 transistor intel 845 crb intel 915 MOTHERBOARD pcb CIRCUIT diagram b1370 e intel 915 MOTHERBOARD CIRCUIT diagram INTEL 845 MOTHERBOARD CIRCUIT diagram intel 845 MOTHERBOARD pcb CIRCUIT diagram mictor connector layout guideline PDF

    Untitled

    Abstract: No abstract text available
    Text: V58C2256 804/404/164 SA HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 5B 5 6 7 DDR400 DDR400 DDR333 DDR266 7.5 ns 7.5 ns 7.5 ns 7.5ns Clock Cycle Time (tCK2.5) 5ns 6ns 6 ns 7ns Clock Cycle Time (tCK3)


    Original     		V58C2256 16Mbit DDR400 DDR333 DDR266 PDF

    Untitled

    Abstract: No abstract text available
    Text: V58C2256 804/404/164 SB HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 5B 5 6 7 DDR400A DDR400A DDR333B DDR266A 7.5 ns 7.5 ns 7.5 ns 7.5ns Clock Cycle Time (tCK2.5) 5ns 6ns 6 ns 7ns Clock Cycle Time (tCK3)


    Original     		V58C2256 16Mbit DDR400A DDR333B DDR266A PDF

    Untitled

    Abstract: No abstract text available
    Text: V58C2256 804/404/164 SA HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 5B 5 6 7 DDR400 DDR400 DDR333 DDR266 7.5 ns 7.5 ns 7.5 ns 7.5ns Clock Cycle Time (tCK2.5) 5ns 6ns 6 ns 7ns Clock Cycle Time (tCK3)


    Original     		V58C2256 16Mbit DDR400 DDR333 DDR266 PDF

    Untitled

    Abstract: No abstract text available
    Text: V58C2256 804/404/164 SA HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 5B 5 6 7 DDR400 DDR400 DDR333 DDR266 7.5 ns 7.5 ns 7.5 ns 7.5ns Clock Cycle Time (tCK2.5) 5ns 6ns 6 ns 7ns Clock Cycle Time (tCK3)


    Original     		V58C2256 16Mbit DDR400 DDR333 DDR266 PDF

    Untitled

    Abstract: No abstract text available
    Text: V58C2128 804/404/164 SB HIGH PERFORMANCE 128 Mbit DDR SDRAM 4 BANKS X 4Mbit X 8 (804) 4 BANKS X 2Mbit X 16 (164) 4 BANKS X 8Mbit X 4 (404) 5B 5 6 7 DDR400 DDR400 DDR333 DDR266 7.5 ns 7.5 ns 7.5 ns 7.5ns Clock Cycle Time (tCK2.5) 5ns 6ns 6 ns 7ns Clock Cycle Time (tCK3)


    Original     		V58C2128 DDR400 DDR333 DDR266 PDF

    Untitled

    Abstract: No abstract text available
    Text: V58C2256 804/404/164 SC*I 256 Mbit DDR SDRAM, INDUSTRIAL TEMPERATURE 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 5B 5 6 7 DDR400 DDR400 DDR333 DDR266 7.5 ns 7.5 ns 7.5 ns 7.5ns Clock Cycle Time (tCK2.5) 5ns 6ns 6 ns 7ns


    Original     		V58C2256 16Mbit DDR400 DDR333 DDR266 PDF

    64Mx16

    Abstract: No abstract text available
    Text: V58C2256 804/404/164 SC HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 5B 5 6 7 DDR400 DDR400 DDR333 DDR266 7.5 ns 7.5 ns 7.5 ns 7.5ns Clock Cycle Time (tCK2.5) 5ns 6ns 6 ns 7ns Clock Cycle Time (tCK3)


    Original     		V58C2256 16Mbit DDR400 DDR333 DDR266 64Mx16 PDF

    Untitled

    Abstract: No abstract text available
    Text: V58C2256 804/404/164 SC HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 5B 5 6 7 DDR400 DDR400 DDR333 DDR266 7.5 ns 7.5 ns 7.5 ns 7.5ns Clock Cycle Time (tCK2.5) 5ns 6ns 6 ns 7ns Clock Cycle Time (tCK3)


    Original     		V58C2256 16Mbit DDR400 DDR333 DDR266 PDF