WiMAX transceivers
Abstract: ah225
Text: AH225 1W High Linearity InGaP HBT Amplifier Applications Repeaters Base Station Transceivers High Power Amplifiers Mobile Infrastructure LTE / WCDMA / CDMA / WiMAX SOIC-8 Package Product Features Functional Block Diagram 400-2700 MHz 15.5 dB Gain @ 2140 MHz
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AH225
AH225
WiMAX transceivers
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Luxeon M
Abstract: 4 step MacAdam ellipse definition LXR7-SW40 4 step MacAdam PHILIPS marking Code 5C LXR7-SW57 MacAdam 5700K LXR7
Text: LUXEON M Array optimized for both high efficacy and high flux density enabling tight beam control Technical Datasheet DS103 LUXEON M High Flux Density and Efficacy Introduction LUXEON M emitters are illumination grade LEDs designed to enable outdoor and industrial applications
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DS103
Luxeon M
4 step MacAdam ellipse definition
LXR7-SW40
4 step MacAdam
PHILIPS marking Code 5C
LXR7-SW57
MacAdam
5700K
LXR7
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74AVCH1T45
Abstract: No abstract text available
Text: 74AVCH1T45 Dual-supply voltage level translator/transceiver; 3-state Rev. 4 — 3 August 2012 Product data sheet 1. General description The 74AVCH1T45 is a single bit, dual supply transceiver that enables bidirectional level translation. It features two 1-bit input-output ports A and B , a direction control input (DIR)
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74AVCH1T45
74AVCH1T45
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Untitled
Abstract: No abstract text available
Text: ADBM-A350 Optical Finger Navigation Data Sheet Description Features The ADBM-A350 sensor is a small form factor SFF optical finger navigation system. • Low power architecture The ADBM-A350 is a low- power optical finger navigation sensor. It has a new, low-power architecture and
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ADBM-A350
ADBM-A350
20ips
20ips.
1000pcs
ADBM-A350-200
200pcs
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tea1719
Abstract: PH1930 nds 3 video guard smart card OPTOCOUPLER SMPS for HDD ph1930al PH2530AL ip4223 SMD 8A TRANSISTOR 702 transistor smd code PH6030AL
Text: Application Guide Notebook Computing Introduction Your partner for notebook computing Designing notebooks isn’t getting any easier. The footprint continues to shrink, and consumers continue to demand more features, faster speeds, on our decades-long leadership in high-performance mixed-signal solutions,
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schematic diagram bluetooth headset
Abstract: bq24080 bq24314A bq24314ADSG BQ24314ADSGR BQ24314ADSGRG4 BQ24314ADSGT JESD22-A114-E schematic diagram bluetooth headset TI
Text: bq24314A www.ti.com SLUS811 – MARCH 2008 OVERVOLTAGE AND OVERCURRENT PROTECTION IC AND Li+ CHARGER FRONT-END PROTECTION IC • FEATURES 1 • Provides Protection for Three Variables: – Input Overvoltage, with Rapid Response in < 1 µs – User-Programmable Overcurrent with
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bq24314A
SLUS811
schematic diagram bluetooth headset
bq24080
bq24314ADSG
BQ24314ADSGR
BQ24314ADSGRG4
BQ24314ADSGT
JESD22-A114-E
schematic diagram bluetooth headset TI
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EL 817 C108
Abstract: HDMI I2C
Text: AM3874, AM3872, AM3871 www.ti.com SPRS695A – SEPTEMBER 2011 – REVISED MARCH 2012 AM387x Sitara ARM Processors Check for Samples: AM3874, AM3872, AM3871 1 High-Performance System-on-Chip SoC 1.1 Features • High-Performance Sitara™ ARM® Processors
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AM3874,
AM3872,
AM3871
SPRS695A
AM387x
16/24/30-bit
16/24-bit
EL 817 C108
HDMI I2C
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DM8148 GMII
Abstract: SPRS647 TMS320DM8146 OPP166 TMS320DM814x GP321 lpddr4 implementing pcb layout on tms320dm814x amplifier HS 9004
Text: TMS320DM8148, TMS320DM8147, TMS320DM8146 SPRS647C – MARCH 2011 – REVISED JANUARY 2012 www.ti.com TMS320DM814x DaVinci Digital Media Processors Check for Samples: TMS320DM8148, TMS320DM8147, TMS320DM8146 1 High-Performance System-on-Chip SoC 1.1 Features
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TMS320DM8148,
TMS320DM8147,
TMS320DM8146
SPRS647C
TMS320DM814x
32K-Byte
DM8148 GMII
SPRS647
TMS320DM8146
OPP166
GP321
lpddr4
implementing pcb layout on tms320dm814x
amplifier HS 9004
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74AHC3GU04
Abstract: 74AHC3GU04DC 74AHC3GU04DP 74AHC3GU04GM JESD22-A114E MO-187
Text: 74AHC3GU04 Inverter Rev. 03 — 26 January 2009 Product data sheet 1. General description The 74AHC3GU04 is a high-speed Si-gate CMOS device. This device provides the inverting single stage function. 2. Features • Symmetrical output impedance ■ High noise immunity
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74AHC3GU04
74AHC3GU04
JESD22-A114E
JESD22-A115-A
JESD22-C101C
74AHC3GU04DP
74AHC3GU04DC
74AHC3GU04DP
74AHC3GU04GM
MO-187
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74AHC2G08
Abstract: 74AHC2G08DC 74AHC2G08DP 74AHCT2G08 74AHCT2G08DC 74AHCT2G08DP JESD22-A114E
Text: 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate Rev. 03 — 12 January 2009 Product data sheet 1. General description The 74AHC2G08; 74AHCT2G08 is a high-speed Si-gate CMOS device. The 74AHC2G08; 74AHCT2G08 provides two 2-input AND gates. 2. Features • Symmetrical output impedance
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74AHC2G08;
74AHCT2G08
74AHCT2G08
JESD22-A114E
JESD22-A115-A
JESD22-C101C
74AHC2G08DP
74AHC2G08
74AHC2G08DC
74AHC2G08DP
74AHCT2G08DC
74AHCT2G08DP
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74hc733
Abstract: 74HC73 74HC73N 74HC73D 74HC73DB 74HC73PW JESD22-A114E SSOP14 SSOP14 package
Text: 74HC73 Dual JK flip-flop with reset; negative-edge trigger Rev. 04 — 19 March 2008 Product data sheet 1. General description The 74HC73 is a high-speed Si-gate CMOS device that complies with JEDEC standard no. 7A. It is pin compatible with Low-power Schottky TTL LSTTL .
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74HC73
74HC73
74hc733
74HC73N
74HC73D
74HC73DB
74HC73PW
JESD22-A114E
SSOP14
SSOP14 package
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HEF4044B
Abstract: HEF4044BP HEF4044BT JESD22-A114E
Text: HEF4044B Quad R/S latch with 3-state outputs Rev. 06 — 11 November 2008 Product data sheet 1. General description The HEF4044B is a quad R/S latch with 3-state outputs, with a common output enable input OE . Each latch has an active LOW set input (1S to 4S), an active LOW reset input
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HEF4044B
HEF4044B
HEF4044BP
HEF4044BT
JESD22-A114E
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74LVT245B
Abstract: 74LVT245BBQ 74LVT245BD 74LVT245BDB 74LVT245BPW JESD22-A114E SO20 SSOP20 MNA175
Text: 74LVT245B 3.3 V octal transceiver with direction pin 3-state Rev. 02 — 8 May 2008 Product data sheet 1. General description The 74LVT245B is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is an octal transceiver featuring non-inverting 3-state bus compatible outputs
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74LVT245B
74LVT245B
74LVT245BBQ
74LVT245BD
74LVT245BDB
74LVT245BPW
JESD22-A114E
SO20
SSOP20
MNA175
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74AHC139
Abstract: 74AHCT139 74AHC139D 74AHC139PW HE4000B
Text: 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer Rev. 02 — 9 May 2008 Product data sheet 1. General description The 74AHC139; 74AHCT139 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard
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74AHC139;
74AHCT139
74AHCT139
AHCT139
74AHC139
74AHC139D
74AHC139PW
HE4000B
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JESD22-A114E
Abstract: NX3L1G53GD NX3L1G53GM NX3L1G53GT
Text: NX3L1G53 Low-ohmic single-pole double-throw analog switch Rev. 03 — 17 April 2009 Product data sheet 1. General description The NX3L1G53 provides one low-ohmic single-pole double-throw analog switch, suitable for use as an analog or digital multiplexer/demultiplexer. It has a digital select input S ,
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NX3L1G53
NX3L1G53
JESD22-A114E
NX3L1G53GD
NX3L1G53GM
NX3L1G53GT
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74LVC1G53
Abstract: 74LVC1G53DC 74LVC1G53DP 74LVC1G53GD 74LVC1G53GT JESD22-A114E MO-187 V53 TSSOP8
Text: 74LVC1G53 2-channel analog multiplexer/demultiplexer Rev. 05 — 11 June 2008 Product data sheet 1. General description The 74LVC1G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device. The 74LVC1G53 provides one analog multiplexer/demultiplexer with a digital select
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74LVC1G53
74LVC1G53
74LVC1G53DC
74LVC1G53DP
74LVC1G53GD
74LVC1G53GT
JESD22-A114E
MO-187
V53 TSSOP8
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21A1
Abstract: 74LV125DB 74HC125 74HCT125 74LV125 74LV125D 74LV125N 74LV125PW JESD22-A114E
Text: 74LV125 Quad buffer/line driver; 3-state Rev. 03 — 7 April 2009 Product data sheet 1. General description The 74LV125 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC125 and 74HCT125. The 74LV125 provides four non-inverting buffer/line drivers with 3-state outputs. The
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74LV125
74LV125
74HC125
74HCT125.
21A1
74LV125DB
74HCT125
74LV125D
74LV125N
74LV125PW
JESD22-A114E
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q11 hbm
Abstract: HEF4040B HEF4040BP HEF4040BT JESD22-A114E
Text: HEF4040B 12-stage binary ripple counter Rev. 04 — 4 March 2009 Product data sheet 1. General description The HEF4040B is a 12-stage binary ripple counter with a clock input CP , an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (Q0 to Q11). The
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HEF4040B
12-stage
HEF4040B
q11 hbm
HEF4040BP
HEF4040BT
JESD22-A114E
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HEF4516B
Abstract: HEF4516BP HEF4516BT JESD22-A114E ZO 405 me
Text: HEF4516B Binary up/down counter Rev. 04 — 12 March 2009 Product data sheet 1. General description The HEF4516B is an edge-triggered synchronous 4-bit binary up/down counter with a clock input CP , an up/down count control input (UP/DN), an active LOW count enable
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HEF4516B
HEF4516B
HEF4516BP
HEF4516BT
JESD22-A114E
ZO 405 me
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AHCT32
Abstract: 74AHC32 74AHC32BQ 74AHC32D 74AHC32PW 74AHCT32 TSSOP14
Text: 74AHC32; 74AHCT32 Quad 2-input OR gate Rev. 04 — 22 May 2008 Product data sheet 1. General description The 74AHC32; 74AHCT32 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard
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74AHC32;
74AHCT32
74AHCT32
74AHC32:
74AHCT32:
EIA/JESD22-A114E
EIA/JESD22-A115-A
AHCT32
74AHC32
74AHC32BQ
74AHC32D
74AHC32PW
TSSOP14
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74AUP1G19GM
Abstract: 74AUP1G19GW JESD22-A114E
Text: 74AUP1G19 Low-power 1-of-2 decoder/demultiplexer Rev. 01 — 13 August 2008 Product data sheet 1. General description The 74AUP1G19 provides a 1-of-2 decoder/demultiplexer with a common output enable. It buffers the data on input pin A and passes it either to output pin 1Y true or 2Y
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74AUP1G19
74AUP1G19
74AUP1G19GM
74AUP1G19GW
JESD22-A114E
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74HC3G04DP
Abstract: 74HC3G04 74HC3G04DC 74HC3G04GD 74HCT3G04 74HCT3G04DC 74HCT3G04DP 74HCT3G04GD JESD22-A114E
Text: 74HC3G04; 74HCT3G04 Inverter Rev. 03 — 2 July 2008 Product data sheet 1. General description The 74HC3G04 and 74HCT3G04 are high-speed Si-gate CMOS devices. They provide three inverting buffers. The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.
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74HC3G04;
74HCT3G04
74HC3G04
74HCT3G04
JESD22-A114E
JESD22-A115-A
HCT3G04
74HC3G04DP
74HC3G04DC
74HC3G04GD
74HCT3G04DC
74HCT3G04DP
74HCT3G04GD
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74AHC1G04
Abstract: 74AHC1G04GW 74AHCT1G04 AHCT1G04 74AHC1G04GV 74AHCT1G04GV 74AHCT1G04GW JESD22-A114E
Text: 74AHC1G04; 74AHCT1G04 Inverter Rev. 07 — 31 May 2007 Product data sheet 1. General description 74AHC1G04 and 74AHCT1G04 are high-speed Si-gate CMOS devices. They provide an inverting buffer. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
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74AHC1G04;
74AHCT1G04
74AHC1G04
74AHCT1G04
OT353-1
OT753
JESD22-A114E:
JESD22-A115-A:
JESD22-C101C:
AHCT1G04
74AHC1G04GW
74AHC1G04GV
74AHCT1G04GV
74AHCT1G04GW
JESD22-A114E
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HEF4001BP
Abstract: datasheet of HEF4001BP HEF4001* OR HEF4001BT HEF4001B JESD22-A114E MO-001
Text: HEF4001B Quad 2-input NOR gate Rev. 05 — 27 March 2008 Product data sheet 1. General description The HEF4001B is a quad 2-input NOR gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
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HEF4001B
HEF4001B
HEF4001BP
datasheet of HEF4001BP
HEF4001* OR
HEF4001BT
JESD22-A114E
MO-001
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