K777 Search Results

sl443

Abstract: SL443 zero voltage AC 8 PIN marking k52 SL53S sl547 sl546 IA-32 Intel Architecture Software Developers Manual manual de transistors k44 intel ia 32 diode k70
Contextual Info: R Mobile Intel Pentium® III Processor and Mobile Intel® Pentium® III Processor-M Specification Update November 2006 Version 059 Notice: The Mobile Intel® Pentium® III Processor and Mobile Intel® Pentium® III Processor-M may contain design defects or errors known as errata which may cause the

DS2165Q

Contextual Info: D A LLA S s e m ic o n d u c to r DS2165/DS2165Q 16/24/32Kbps ADPCM Processor PIN ASSIGNM ENT FEATURES • Compresses/expands 64Kbps PCM voice to/from either 32Kbps, 24Kbps, or 16Kbps • Dual, fully independent channel architecture; device can be programmed to perform either:

Contextual Info: HM5216808C Series HM5216408C Series 1,048,576-word x 8-bit x 2-bank Synchronous Dynamic RAM SSTL-3 2,097,152-word x 4-bit x 2-bank Synchronous Dynamic RAM (SSTL-3) HITACHI ADE-203-617 (Z) Preliminary Rev. 0.0 Jul. 10, 1996 Description A ll inputs and outputs are referred to the rising edge of the clock input. The HM5216808C Series,

DIP32

Abstract: LC33864M LC33864P LC33864P-80 en4701 EN4701A
Contextual Info: Ordering number : EN4701A CMOS LSI LC33864P-80, M-70/80/10 512 K 65536 words x 8 bits Pseudo-SRAM Overview Package Dimensions The LC33864 series is com posed o f pseudo static RAM unit: mm that operate on a single 5 V pow er supply and is organized 3192-DIP32

dp8477

Abstract: PC87560UBD nec 8237 ex hcl notebook l19 MOTHERBOARD CIRCUIT diagram N82077 8259 interface with 8051 Peripheral FXA16 ic 8038 APPLICATIONS PC87570 DS1287
Contextual Info: P R E L IM IN A R Y N a tiona l Semiconductor November 1997 PC87560UBD — PCI System I/O 1.0 General Description 2.0 Features The PC87560 is a highly integrated IC which incorporates PCI Interface, Bus Mastering Fast IDE Controller, Universal Serial Bus USB Host Controller, commonly-used I/O pe­

256KX4

Abstract: V53C104B V53C104 casco battery
Contextual Info: JVH VITEUC V53C104B HIGH PERFORMANCE, LO W POW ER 256K X 4 B IT FA S T PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 60/60L 70/70L 80/80L Max. RAS Access Time, tp ^ 60 ns 70 ns 80 ns Max. Column Address Access Time, (tCAA) 30 ns 35 ns 40 ns Min. Fast Page Mode Cyde Time, (tp^)

53461

Contextual Info: HM53461 Series-65,536-word x 4 bit Multi Port CMOS Dynamic Random Access Memory The HM53461P is a 262,144 bit multi port memory equipped with a 64k word x 4 bit Dynamic RAM port and a 256 word x 4 bit Serial Access Memory SAM port. The SAM port is connected

Contextual Info: ADE-203-199 A (Z) HM5221605 Series 65,536-word x 16-bit x 2-bank Synchronous Dynamic RAM Preliminary Rev. 0.1 Sep. 22, 1994 HITACHI All inputs and outputs are referred to the rising edge of the clock input. The HM5221605 is offered in 2 banks for improved performance.

K777 EQUIVALENT

Abstract: K777
Contextual Info: Optical disc ICs 3-phase motor driver BA6840BFS/BA6840BFP-Y/BA6840BFP/ BA6842BFS The BA6840BFS, BA6840BFP-Y, BA6840BFP, and BA6842BFS are one-chip ICs designed for driving CD-ROM mo­ tors. They are high performance-ICs with a 3-phase, full-wave, pseudo-linear drive system.

rca thyristor manual

Abstract: HN623258 101490
Contextual Info: Quick Reference Guide to Hitachi 1C Memories Package Information Reliability of Hitachi 1C Memories Applications MOS Static RAM MOS Pseudo Static RAM Application Specific Memory MOS Dynamic RAM MOS Dynamic RAM Module MOS Mask ROM MOS PROM ECL RAM P> Jc^< j

yrm 620

Contextual Info: ijf r VITEUC V53C104B HIGH PERFORMANCE, LO W POWER 256K X 4 B IT FAST PAGE MODE CMOS DYNAMIC RAM 60/60L 70/70L 80/80L Max RAS Access Time, t„ . _ 1 RAC' 60 ns 70 ns 80 ns Max Column Address Access Time, (*CAA) 30 ns 35 ns 4 0 ns Min Fast Page Mode Cyde Time, (tpç)

nec A2C

Contextual Info: MOS INTEGRATED CIRCUIT ju P D 4 2 S 1 6 1 6 5 L , 4 2 1 6 1 6 5 L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, HYPER PAGE MODE, BYTE READ/WRITE MODE Description The|iPD42S16165L, 4216165Lare 1 048 576 w ords by 16 bits dynamic CMOS RAMs w ith optional hyper page

LH6C4265

Abstract: LH6C4265AK-40
Contextual Info: SHARP SPEC No. I SSUE: EL08Z014 DEC. 17 1996 To : S P E C I F Product Type_ 4M I C A T I O N S D R A M 2561 x 16bit _ L H 6 C 4 2 6 5 A K —40 M odel No. (LH6C4H4K) SKThis specifications contains 28 pages including the cover and appendix.

mc6809

Abstract: SSC 9500 m6809 MC6829 MC6809E free 74ls74 pin configurations M6809 cpu MC68B29L 50T180 m6809 reference design
Contextual Info: gl M O TO R O LA MC6829 Advance Information HMOS MEMORY M ANAGEM ENT UNIT (HIGH DENSITY N-CHANNEL, SILICON-GATE The principle fu n c tio n o f the M C6829 M em o ry M anagem ent U nit (M M U ) is to expand the address space o f the M C 6 8 0 9 fro m 64K bytes to

Contextual Info: PoworPC P r e lim in a r y D a ta PowerPC 620 RISC Microprocessor P ro d u ct D escription H ig h lig h ts • • 6 4 - b il A d v a n c e d S u p e r s c a ie r P ro c esso r: 2 0 - e n trv , f u lly a s s o c ia tiv e seg m ent lo o k a s id e b u f f e r

Contextual Info: PICO’S Ultra-miniature transformei These units can be manufactured and tested to MIL-PRF-27/358. Contact factory for price and delivery information and appropriate part numbers MIL-PRF-27/358-01 thru MIL-PRF-27/358-123 . A C O A V 7 TNUMBBR K-Series Insulated N-Series

MC-422000A36FK-70

Abstract: MC-422000A36F-70 422000A36 MC-422000A36B-70 MC422000A36FK70 MC-422000A36FK nec mc-422000a36fk-70 MC-422000A36BK-70
Contextual Info: NEC MOS INTEGRATED CIRCUIT MC-422000A32, 422000A36 SERIES 2 M-WORD BY 32-BIT, 2 M-WORD BY 36-BIT DYNAMIC RAM MODULE FAST PAGE MODE D escription The MC-422000A32 series is a 2 097 152 w ords by 32 bits dynam ic RAM m odule on which 16 pieces o f 4 M DRAM jiPD424400 are assembled.

K745

Abstract: K746 K7630 K7250 k739 K-7630 7815 CT K-7285 K724 k75-10
Contextual Info: Ultra Miniature Transformers N Series Plug-In and K Series Insulated Leads The PICO "N Series" units can be manufactured and tested to MIL-PRF/358. Contact factory for price and delivery information and appropriate part numbers MIL-PRF-27/358-01 thru MIL-PRF-27/358-123

Contextual Info: All rights strictly reserved. Reproduction or issue to third porties in any form whatever is not permitted without written authority from the proprietor. Property of F C t. Copyright FCI. CD “n -H m z z — CD < — go — 3D z O ~n rn — m z 1— 3 3 z

42S4260

Abstract: upd 40pin
Contextual Info: DATA SHEET M O S INTEGRATED CIRCUIT juPD42S4260AL, 424260AL 3.3 V OPERATION 4 M BIT DYNAMIC RAM 256 K-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description The juPD42S4260AL, 424260AL are 262 144 words by 16 bits dynamic CMOS RAMs. The fast page mode and

SL546

Abstract: K8 specifications MSRs 243356 PMM6000 SL54G sl583 marking k47 invalid K91 pml50 QX6700
Contextual Info: Mobile Intel Pentium® III Processor and Mobile Intel® Pentium® III Processor-M Specification Update August 2007 Revision 063 Intel Confidential Document Number: 245306-063 2BPreface INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR

TRANSISTOR C 3205

Abstract: ZZZ3 D015M DIP32 LC338128M LC338128P GL-108
Contextual Info: Ordering num ber : EN ì% 4711 CMOS LSI SA\YO Preliminary No.ì*4711 LC338128P, M, PL, ML-70/80/10 1 MEG 131072 words x 8 bits Pseudo-SRAM i Overview The LC338128 series is composed of pseudo static RAM that operate on a single 5 V power supply and is organized

E150709

Abstract: 476d E165143 K777 d 1877 d877 k177 A777 07 k17 016-O
Contextual Info: ! "#$ % & % ' & & % ! % % ! • • • • * + • , % % & • ' & . & • • • ) - • +/0101 +/0112 3 4 ) % ) " % %- " % % ! ' " % 5" & ! & ! 6) # ) 78 7: 07 01 47 6 98! 7 9:! 7 907! 7 901! 7 947! 7 & 6 < ) 4 4 = 07> 7 ? 077 44 4 44 4 ; 44 070 ; 447

V53C104

Abstract: l04b 256KX4 V53C104B tnr dip mil std v53c104b80
Contextual Info: JVH VITEUC V53C104B HIGH PERFORMANCE, LO W POW ER 256K X 4 B IT FA S T PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 6 0 /6 0 L 7 0 /7 0 L 8 0 /80L Max. RAS Access Time, t p ^ 60 ns 70 ns 80 ns Max. Column Address Access Time, (tCAA) 30 ns 35 ns 40 ns Min. Fast Page Mode Cyde Time, (tp^)