L7C185KMB Search Results

L7C185KMB Datasheets (8)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
L7C185KMB12		Logic Devices	8K x 8 Static RAM (Low Power)		Scan	PDF
L7C185KMB15		Logic Devices	8K x 8 Static RAM (Low Power)		Scan	PDF
L7C185KMB15L		Logic Devices	SRAM GP Single Port		Original	PDF
L7C185KMB20		Logic Devices	8K x 8 Static RAM (Low Power)		Scan	PDF
L7C185KMB20L		Logic Devices	SRAM GP Single Port		Original	PDF
L7C185KMB25		Logic Devices	8K x 8 Static RAM (Low Power)		Scan	PDF
L7C185KMB25L		Logic Devices	SRAM GP Single Port		Original	PDF
L7C185KMB35		Logic Devices	8K x 8 Static RAM (Low Power)		Scan	PDF

L7C185KMB Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
L7C185 Abstract: No abstract text available Text: L7C185 L7C185 DEVICES INCORPORATED 8K x 8 Static RAM Low Power 8K x 8 Static RAM (Low Power) DEVICES INCORPORATED DESCRIPTION ROW SELECT 8 O ROW ADDRESS CE 1 CE 2 WE OE CONTROL as 2 V. The L7C185 and L7CL185-L consume only 30 µW and 15 µW (typical) respectively at 3 V, allowing	Original	L7C185 L7C185 L7C185-L L7CL185-L typi12 MIL-STD-883	PDF
L7C185KM25 Abstract: IDT7164 L7C185PC12 L7C185PC15 L7C185PC20 Text: L7C185 L7C185 DEVICES INCORPORATED 8K x 8 Static RAM Low Power 8K x 8 Static RAM (Low Power) DEVICES INCORPORATED FEATURES DESCRIPTION q 8K x 8 Static RAM with Chip Select Powerdown, Output Enable q Auto-Powerdown Design q Advanced CMOS Technology q High Speed — to 12 ns maximum	Original	L7C185 L7C185) L7C185-L) MIL-STD-883, IDT7164, CY7C185/186 28-pin L7C185KM25 IDT7164 L7C185PC12 L7C185PC15 L7C185PC20	PDF
HM1E Abstract: 5962-3829435 IDT7164L70L32B mk48h64 5962-3829407MXX 62l64-45 HC6364 5962-8552505X QML-38535 IDT7164S55DB Text: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED E Added changes in accordance with NOR 5962-R085-93 93-03-16 M. A. Frye F Added device types 45, 46, and 47. Removed CAGE code 34168 for case outline 8, and added cage code 34168 for case outline 9. Editorial changes throughout.	Original	5962-R085-93 0EU86 MN14-3c12 HM1E 5962-3829435 IDT7164L70L32B mk48h64 5962-3829407MXX 62l64-45 HC6364 5962-8552505X QML-38535 IDT7164S55DB	PDF
QP7C185A-55DMB Abstract: QP7C185A IDT7164L70L32B QP7C185A-70DMB qml-38535 MT5C6408C-20 5962-3829435 EDI8810L 0EU86 22 35L CAPacitor Text: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED E Added changes in accordance with NOR 5962-R085-93 93-03-16 M. A. Frye F Added device types 45, 46, and 47. Removed CAGE code 34168 for case outline 8, and added cage code 34168 for case outline 9. Editorial changes throughout.	Original	5962-R085-93 0EU86 QP7C185A-55DMB QP7C185A IDT7164L70L32B QP7C185A-70DMB qml-38535 MT5C6408C-20 5962-3829435 EDI8810L 0EU86 22 35L CAPacitor	PDF
Untitled Abstract: No abstract text available Text: LOGIC DEVICES INC 8K X 8 Static RAM 2bE D Low Power FEATURES • 55L.5Ì05 aOGlG3b 7 ■ L 7 C 1 8 5 / L 7 C L 1 8 5 DESCRIPTION 'T ¥ ¿ - 2 3 -/1 li data may be retained in inactive stor The L7C185 and L7CL185 are highperformance, low-power CMOS static age with a supply voltage as low as	OCR Scan	L7C185 L7CL185 L7CL185 L7CL185UO L7C185KM L7CL185KM L7C185TME L7CL185TME L7C185KMB	PDF
ed18810 Abstract: 5962-3829453MTa QML-38535 5962-3829410MYX 5962-R085-93 IDT7164L70L32B 5962-3829412MXA GDIP1-T28 5C640 UT6717685 Text: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED E Added chanaes in accordance with NOR 5962-R085-93 93-03-16 M. A. Frve F Added device types 45, 46, and 47. Removed CAGE code 34168 for case outline 8, and added cage code 34168 for case outline 9. Editorial changes throughout.	OCR Scan	5962-R085-93 S8015 0EU86 MN14-3c12 GD3LG21 ed18810 5962-3829453MTa QML-38535 5962-3829410MYX 5962-R085-93 IDT7164L70L32B 5962-3829412MXA GDIP1-T28 5C640 UT6717685	PDF
Untitled Abstract: No abstract text available Text: L7C185 : v ;:i s r.r:;H pnH A m l FEATURES □ 8K x 8 Static RAM with Chip Select Pow erdow n, O utput Enable □ A uto-Pow erdow n Design □ A dvanced CMOS Technology □ High Speed — to 12 ns m axim um □ Low Pow er Operation Active: 425 m W typical at 25 ns	OCR Scan	L7C185 L7C185 185-L L7C185TC L7C185TC15* L7C185TC12* L7C185KC20* L7C185KC15* L7C185KC12* L7C185KM25*	PDF
Untitled Abstract: No abstract text available Text: L7C185 8K x 8 Static RAM Low Power DEVICES INCORPORATED DESCRIPTION FEATURES □ 8K x 8 Static RAM with Chip Select Powerdown, Output Enable □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 12 ns maximum □ Low Power Operation	OCR Scan	L7C185 400pW L7C185) L7C185-L) MIL-STD-883, IDT7164, CY7C185/186 28-pin	PDF
L7C185NC45 Abstract: No abstract text available Text: LOGIC D E V I C E S lENC ILE D • SS bST DS QGO0S7b 1 L7C185 8K x 8 Static RAM Features -r-1/6-23-/2. Description □ 8K by 8 Static RAM with chip select The L7C185 is a high-performance, low-power CMOS static RAM. The powerdown, output enable storage circuitry is organized as 8,192	OCR Scan	L7C185 -r-1/6-23-/2. L7C185 L7C185NC45	PDF
Untitled Abstract: No abstract text available Text: 8K X 8 Static RAM L7C1 85/L7GL1 85 Low Power FEATURES □ 8K x 8 Static RAM with Chip Select Powerdown, Output Enable □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 10 ns maximum □ Low Power Operation Active: 320 mW (L7C185) typical at 35 ns	OCR Scan	85/L7GL1 L7C185) L7CL185) IDT7164, CY7C185/186 28-pin	PDF
Untitled Abstract: No abstract text available Text: L7C185 D E V IC F S IN C O R P O R A I h l ' FEATURES □ 8K x 8 Static R A M w ith C hip Select Pow erd ow n, O utpu t Enable □ A uto-Pow erdow n Design □ A dvanced C M O S Technology □ H igh Sp eed — to 12 ns m axim um □ Low Pow er O peration	OCR Scan	L7C185 7C185 185-L L7C185KC20* L7C185KC15* L7C185KC12* L7C185TC20* L7C185TC15* L7C185TC12* L7C185KM25*	PDF
Untitled Abstract: No abstract text available Text: L7C185 8K x 8 Static RAM Low Power DEVICES INCORPORATED DESCRIPTION □ 8K x 8 Static RAM with Chip Select Powerdown, Output Enable □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 10 ns maximum □ Low Power Operation Active: 320 mW typical at 35 ns	OCR Scan	L7C185 L7C185) L7C185-Low MIL-STD-883, L7C185 IDT7164, CY7C185/186 28-pin	PDF
IDT7164 Abstract: No abstract text available Text: LOGIC DEVICES INC 8K X 8 Static RAM 2bE D Low Power FEATURES □ 8K x 8 Static RAM with Chip Select Powerdown, Output Enable □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 10 ns maximum Q Low Power Operation Active: 320 mW (L7C185) typical at 35 ns	OCR Scan	0G01G3b L7C185/L7CL185 L7C185) L7CL185) IDT7164, CY7C185/186 28-pin IDT7164	PDF
TI18 Abstract: No abstract text available Text: L7C185 8K x 8 Static RAM Low Power DESCRIPTION FEATURES □ 8K x 8 Static RAM with Chip Select Powerdown, O utput Enable □ □ □ □ Auto-Powerdown Design A dvanced CM OS Technology H igh Speed — to 12 ns m aximum Low Power Operation Active: 425 mW typical at 25 ns	OCR Scan	L7C185 400iiW L7C185) L7C185-L) MIL-STD-883, IDT7164, CY7C185/186 28-pin TI18	PDF

l7c185uc85 Abstract: l7C185VC-85 L7C185nc Text: LOGIC D E V I C E S lENC ILE D • SSbSTDS Features Description □ 8K by 8 Static RAM with chip select powerdown, output enable The L7C185 is a high-performance, low-power CMOS static RAM. The storage circuitry is organized as 8,192 words by 8 bits per word. The 8 Data	OCR Scan	L7C185 T-1-16-23-12- IDT7164, CY7C185/186 28-pin 28-pinPlastic l7c185uc85 l7C185VC-85 L7C185nc	PDF