LMU12GC20 Search Results

TCA 210

Abstract: advanced tca LMU12GC20 LMU12GC35 MPY012H
Contextual Info: LMU12 LMU12 DEVICES INCORPORATED 12 x 12-bit Parallel Multiplier 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES ❑ ❑ ❑ ❑ DESCRIPTION 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces Fairchild MPY012H Two’s Complement, Unsigned, or

Contextual Info: LMLL12 •Vi» /lif iu LMU12 mm 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES_ □ □ □ □ 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces TRW MPY012H Two's Complement, Unsigned, or Mixed Operands □ Three-State Outputs

TCA 210

Abstract: LMU12GC45 LMU12DC65 LMU12GC20 LMU12GC35 LMU12GC65 MPY012H
Contextual Info: LMU12 LMU12 DEVICES INCORPORATED 12 x 12-bit Parallel Multiplier 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES ❑ ❑ ❑ ❑ ❑ ❑ ❑ DESCRIPTION 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces TRW MPY012H Two’s Complement, Unsigned, or

lmu12gc45

Contextual Info: — — — — LMU12 12 x 1 2 - b i t P a r a l l e l M u l t i p l i e r FEATURES ; □ 20 ns W orst-C ase M u ltiply Tim e □ L ow P ow er C M O S T echnology □ R eplaces T R W M PY012H □ T w o 's C om plem ent, U nsigned, or M ixed O perand s □ T hree-State O utpu ts

Contextual Info: LMU12 12 x 12-bit Parallel Multiplier D E V IC E S IN C O R P O R A T E D DESCRIPTION FEATURES □ □ □ □ 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces Fairchild MPY012H Two's Complement, Unsigned, or Mixed Operands □ Three-State Outputs

Contextual Info: LMU12 12 x 12-bit Parallel Multiplier DEVICES INCORPORATED FEATURES DESCRIPTION □ 20 ns Worst-Case Multiply Time □ Low Power CMOS Technology □ Replaces TRW MPY012H □ Two's Complement, Unsigned, or Mixed Operands □ Three-State Outputs □ Available 100% Screened to

Contextual Info: . i\\\ Ci >•111 LMU12 12 x 12-bit Parallel Multiplier □ FV IC E S IN C O R P Q R A T F D DESCRIPTION FEATURES □ 20 ns W orst-Case M ultiply Time □ Low Power CMOS Technology □ Replaces Fairchild MPY012H □ Tw o's Complement, Unsigned, or Mixed Operands

2A1121

Contextual Info: LMU12 12 x 12-bit Parallel Multiplier FEATURES DESCRIPTION □ □ □ □ 20 ns Worst-Case Multiply Time Low Power CMOS Technology Replaces TRW MPY012H Two’s Complement, Unsigned, or Mixed Operands □ Three-State Outputs □ Available 100% Screened to

lmu12gc45

Contextual Info: I M II1 ? L3VIU12 12 x 12-bit Parallel M u ltip lie r □ 20 ns Worst-Case Multiply Time □ Low Power CMOS Technology □ Replaces TRW MPY012H □ Tw o’s Complement, Unsigned, or Mixed Operands □ Three-State Outputs □ Available 100% Screened to MIL-STD-883, Class B