LVX11 Search Results

74LVX112

Abstract: 74LVX112M 74LVX112MTC 74LVX112SJ LVX112 M16A M16D MTC16
Contextual Info: LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description The LVX112 is a dual J-K Flip-Flop where each flip-flop has independent inputs J, K, PRESET, CLEAR, and CLOCK and outputs (Q, Q). These devices are edge sensitive and change states synchronously on the negative going transition of the clock pulse. Triggering occurs at a voltage level of

74LVX112

Abstract: 74LVX112M 74LVX112MTC 74LVX112SJ LVX112 M16A M16D MTC16
Contextual Info: Revised December 2003 LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description The LVX112 is a dual J-K Flip-Flop where each flip-flop has independent inputs J, K, PRESET, CLEAR, and CLOCK and outputs (Q, Q). These devices are edge sensitive and

LVX165

Abstract: MC74LVX3245 lvx161284 lvx125 lvx245 LVX132 MC74LVX2 LVX541 74lv139 applications hex inverter
Contextual Info: HC Portfolio Comparison PART # LVX00 LVX02 LVX04 LVXU04 LVX05 LVX06 LVX07 LVX08 LVX10 LVX11 LVX14 LVX20 LVX21 LVX27 LVX32 LVX50 LVX74 LVX86 LVX107 LVX109 LVX112 LVX123 LVX125 LVX126 LVX132 LVX138 LVX139 LVX153 LVX154 LVX157 LVX158 LVX161 LVX163 LVX164 LVX165

Contextual Info: S E M IC O N D U C T O R LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description Th e inputs tolerate voltages up to 7V allowing the interface of 5V system s to 3V system s. The LVX112 is a dual J-K Flip-Flop where each flip-flop has

MTC 25-16

Abstract: 74LVX112 74LVX112M 74LVX112MTC 74LVX112SJ LVX112 M16A M16D MTC16
Contextual Info: A I R C H I I- D S E M IC O N D U C T O R im LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description The inputs tolerate voltages up to 7 V allowing the interface of 5V system s to 3 V system s. The LVX112 is a dual J-K Flip-Flop w here each flip-flop has

74LVX112

Abstract: 74LVX112M 74LVX112MTC 74LVX112MTCX 74LVX112MX 74LVX112SJ 74LVX112SJX LVX112 M16A M16D
Contextual Info: LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description The LVX112 is a dual J-K Flip-Flop where each flip-flop has independent inputs J K PRESET CLEAR and CLOCK and outputs (Q Q) These devices are edge sensitive and change states synchronously on the negative going transition of the clock pulse Triggering occurs at a voltage level

Contextual Info: A I R C H October 1996 I L D Revised March 1999 S E M [CONDUCTOR TM LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description The LVX112 is a dual J-K Flip-Flop where each flip-flop has independent inputs J, K, PRESET, CLEAR, and CLOCK

74LVX112

Abstract: 74LVX112M 74LVX112MTC 74LVX112SJ LVX112 M16A M16D MTC16
Contextual Info: Revised March 1999 LVX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear General Description The LVX112 is a dual J-K Flip-Flop where each flip-flop has independent inputs J, K, PRESET, CLEAR, and CLOCK and outputs (Q, Q). These devices are edge sensitive and

Contextual Info: Revised March 1999 SEMICONDUCTOR TM General Description The inputs tolerate voltages up to 7V allowing the interface of 5V system s to 3V system s. Features • Input voltage level translation from 5 V -3 V ■ Ideal fo r low pow er/low noise 3.3V applications

74LVX112

Abstract: 74LVX112M 74LVX112MTC 74LVX112SJ LVX112 M16A M16D MTC16 AD508
Contextual Info: S E M I C O N D U C T O R Revised March 1999 TM General Description either state without affecting the flip-flop, provided that they are in the desired state during the recommended setup and hold times relative to the falling edge of the clock. The inputs tolerate voltages up to 7V allowing the interface