G30 922
Abstract: MB86907 AD29 AG20 AG21 AG25 ag20 ta EL B17
Text: Highly Integrated 32-bit RISC Microprocessor - TurboSPARC ELECTRICAL SPECIFICATIONS Table 6. Absolute Maximum Ratings Symbol Min Max Units VDD1, VDD3, VDD4 -0.5 4 V VDD2 -0.5 6 V Input Voltage 5v VIN -0.5 6 V Input Voltage (3v) VIN -0.5 4 V Input Clamp Current (any pin)
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PP-DS-20339-11/96
G30 922
MB86907
AD29
AG20
AG21
AG25
ag20 ta
EL B17
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MB86907
Abstract: 00FF mb8690
Text: TurboSPARC Microprocessor User’s Guide October 1996 Revision 1.0 TurboSPARC Microprocessor User’s Manual Table of Contents Chapter 1 The TurboSPARC Microprocessor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.1 Integer Unit and Floating Point Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
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PP-UM-20383-10/96
MB86907
00FF
mb8690
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LR33000
Abstract: 486slc LR3330 Cyrix 6X 79r3081
Text: H The HP B4600A System Performance Analysis Tool Set For the HP 16505A Prototype Analyzer System Performance Analysis for the Entire Design Team 2 Meet Your Time to Market and Price/Performance Goals The success of your digital system depends upon three factors—functionality, time-to-market and the
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B4600A
6505A
17-21/F
5964-3561E
LR33000
486slc
LR3330
Cyrix 6X
79r3081
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mb86904
Abstract: STP1012PGA STP1012PGA-85 microsparc RISC processor STP2001 SPARC v8 architecture BLOCK DIAGRAM MB8690 microsparc SPARC 7 sparc v8
Text: STP1012 July 1997 microSPARC -II DATA SHEET SPARC v8 32-Bit Microprocessor With DRAM Interface DESCRIPTION The microSPARC-II 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture v8 specification, it is ideally suited for low-cost uniprocessor applications.
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STP1012
32-Bit
STP1012PGA-70A
STP1012PGA-85
STP1012PGA-110
mb86904
STP1012PGA
STP1012PGA-85
microsparc RISC processor
STP2001
SPARC v8 architecture BLOCK DIAGRAM
MB8690
microsparc
SPARC 7
sparc v8
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MB86901
Abstract: MB89251 Fujitsu MB86900 mb86900 MB86902 instruction set Sun SPARC T8 MB86931-20ZF-G
Text: MB86931 930 Series 32–BIT RISC EMBEDDED PROCESSOR/ INTERRUPT CONTROLLER/TIMER/USART MAY 24, 1994 FEATURES • 40 MHz 25ns/cycle operating frequency • SPARC high performance RISC processor – 2 Kbytes 2–way set associative instruction and data caches.
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MB86931
25ns/cycle)
MB86901
MB89251
Fujitsu MB86900
mb86900
MB86902
instruction set Sun SPARC T8
MB86931-20ZF-G
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AXP 209 IC
Abstract: AXP 193 AXP 188 AXP 188 IC AXP 199 AXP 209 Datasheet AXP 209 80486DX architecture mb86900 486DX2
Text: Benchmarking the Am186EM Using the Dhrystone V2.1 as an example Don Gille Sr. Field Application Engineer Advanced Micro Devices Inc. Table of Contents
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Am186EM
PDRT186,
AXP 209 IC
AXP 193
AXP 188
AXP 188 IC
AXP 199
AXP 209 Datasheet
AXP 209
80486DX architecture
mb86900
486DX2
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MB86901
Abstract: mb86900 Fujitsu MB86900 MB86902 mb86930-40 MB86930-20PFV-G MB86930-40CR-G ASI1 MARKING MB86930 MB86930-30ZF-G
Text: MB86930 930 Series 32-BIT RISC EMBEDDED PROCESSOR May 25, 1994 Included to maximize the performance of the system with minimum glue logic, are chip select outputs, programmable wait-state generation and built-in support for a high performance connection to page-mode DRAM. See
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MB86930
32-BIT
MB86930
25ns/cycle)
MB86901
mb86900
Fujitsu MB86900
MB86902
mb86930-40
MB86930-20PFV-G
MB86930-40CR-G
ASI1 MARKING
MB86930-30ZF-G
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MB86907
Abstract: Force Computers sparc sparcstation Opus systems
Text: FUJITSU MICROELECTRONICS' NEW TurboSPARC PROCESSOR SETS NEW PERFORMANCE LEVEL FOR LOW-END, MID-RANGE WORKSTATIONS Now in Design at Leading SPARC-Compatible Workstation Manufacturers SAN JOSE, Calif., Sept. 30, 1996 - Supported by the leading SPARC-compatible workstation manufacturers - including Tatung Science
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MB86907,
321-pin
MB86907
Force Computers sparc
sparcstation
Opus systems
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MB86907
Abstract: Skylark CS4231 "PPTP" sun4m
Text: OpenBoot PROM Addendum Note: This is a preliminary Fujitsu Microelectronics Inc. document. This document is subject to changes at any time without notice. OBP for the TurboSPARC The OBP version 2.15 has been modified for the TurboSPARC microprocessor in a SS5-like
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arch/sun4m/microsparc/sr71
10000000/sbus
CS4231
MB86907
Skylark
CS4231
"PPTP"
sun4m
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MB86907
Abstract: sparcstation
Text: SPARC Microprocessors 34k Product Brief: TurboSPARC Microprocessor - Introduction to TurboSPARC TurboSPARC Microprocessor User's Guide TurboSPARC - Highly Integrated 32-bit RISC Microprocessor Datasheet 336k Description pgs.1-11 493k Specifications pgs.12-28
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MB86907,
MB86907
sparcstation
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XL4005
Abstract: M3328 UPD71641 scx6B31 upd65022 UPD72120 SCX6B120 TMC3201 UPD65081 SCX6218
Text: MHAS MPAS DEVICE-TO-PGA SOCKET CROSS ANALOG DEVICES DEVICE PART NO. SAMTEC CONNECTOR ADSP-1009A ADSP-1010A ADSP-1012A ADSP-1016A ADSP-1024A ADSP-1101 ADSP-3201 ADSP-3202 ADSP-3210 ADSP-3211 ADSP-3220 ADSP-3221 MPAS-068-XXXX-11 MPAS-068-XXXX-11 MPAS-068-XXXX-11
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ADSP-1009A
ADSP-1010A
ADSP-1012A
ADSP-1016A
ADSP-1024A
ADSP-1101
ADSP-3201
ADSP-3202
ADSP-3210
ADSP-3211
XL4005
M3328
UPD71641
scx6B31
upd65022
UPD72120
SCX6B120
TMC3201
UPD65081
SCX6218
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MB86903
Abstract: instruction set Sun SPARC T3 CY7C601
Text: MB86903 ~ FUJITSU SPARC -BASED IU/FPU AUGUST 1991 DATA SHEET FE A T U R E S _ G E N E R A L D E S C R IP T IO N • Single chip im plementation o f SPARC IU and FPU based upon the SPARC architecture The MB86903 is the first commercially available pro
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MB86903
32-bit
MB86903
instruction set Sun SPARC T3
CY7C601
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mb86901
Abstract: MB86911 SN74ACT8847
Text: Novem ber, 1988 FEATURES DESCRIPTION • 3 .3 0 MFLOPS Unpack Single Precision Performance The MB86911 is a high perform ance CMOS Floating Point Controller for Fujitsu's MB86901 S -2 5 Integer • 2 .7 0 MFLOPS Unpack Double Precision Perform ance Unit (IU). The MB86911 provides a tightly coupled inter
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MB86911
MB86901
MB86901
SN74ACT8847TM
MB86911CR-G
SN74ACT8847
8962BTIPC
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Untitled
Abstract: No abstract text available
Text: STP1012 S un M ic r o e l e c t r o n ic s J u ly 1997 microSPARC -ll DATA SHEET SPARC v8 32-Bit Microprocessor With DRAM Interface D e s c r ip t io n The microSPARC-II 32-bit m icroprocessor is a highly integrated, high-perform ance microprocessor. Im ple
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STP1012
32-Bit
1012P
1012PG
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AXP 209
Abstract: UPD65031 UPD65070 UPD65006 intel 80487 SCX6206 HG62B40 UPD65022 mb86901 UPD71641
Text: _► ADVANCED Device to PGA Socket Cross Reference INTERCONNECTIONS. 5 Energy Way, P.O. Box 1019, West Warwick, RI 02893 USA Tel. 800-424-9850 / 401-823-5200 •Fax 401-823-8723 ■Email advintcorp@aol.com ■Internet http://www.advintcorp.com Actel Device#
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A1280-PG176
A1240-PG132
MB86920
MB86930
MB86940
MB87067
MB87068
MB8764
MBL80286
AXP 209
UPD65031
UPD65070
UPD65006
intel 80487
SCX6206
HG62B40
UPD65022
mb86901
UPD71641
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mb86901
Abstract: No abstract text available
Text: F U J IT S U High Performance 32-Bit RISC Processor SPARC FEATURES • Architecture supports scalability towards faster technologies • Address presentation which supports highperformance cache • 15 times V A X ™ 11/780 equivalent MIPS typical performance
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32-Bit
MB86911
CH23001
mb86901
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Fujitsu FP 410
Abstract: tag 200-600 L2 300-900MHz
Text: TurboS PARC FUJITSU Highly Integrated 32-bit RISC Microprocessor DATASHEET DESCRIPTION The Fujitsu TurboSPARC Microprocessor is a high frequency, highly integrated single-chip CPU providing balanced integer and floating point performance. The TurboSPARC micro
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PP-DS-20339-01/97
Fujitsu FP 410
tag 200-600 L2
300-900MHz
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mb86904
Abstract: MB8690 microsparc M Meiko microsparc I microsparc 1
Text: S un M icro electro nics July 19 97 microSPARC -ll DATA SHEET SPARC v8 32-Bit Microprocessor With DRAM Interface D e s c r ip t io n The microSPARC-II 32-bit microprocessor is a highly integrated, high-performance microprocessor. Imple menting the SPARC Architecture v8 specification, it is ideally suited for low-cost uniprocessor applications.
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32-bit
STP1012PGA-70A
TP1012PG
1012PG
STP1012
mb86904
MB8690
microsparc
M Meiko
microsparc I
microsparc 1
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mb86901
Abstract: MB86902 Fujitsu MB86900 mb86900 MB89251 CE109
Text: MB86931_ FUJITSU 9 SPARCIite 32-BIT RISC EMBEDDED PROCESSOR/ INTERRUPT CONTROLLER/TIMER/USART M A Y 25,1994 FEATURES_ _ • 40 MHz 25ns/cycle operating frequency • S P A R C high performance R IS C processor
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32-BIT
MB86931_
25ns/cycle)
mb86901
MB86902
Fujitsu MB86900
mb86900
MB89251
CE109
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mb86904
Abstract: td 232 v8 TAG 257 600
Text: STP1012 S un M ic r o e l e c t r o n ic s J u ly 1997 microSPARC -ll DATA SHEET SPARC v8 32-Bit Microprocessor With DRAM Interface D e s c r ip t io n The microSPARC-H 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the
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STP1012
32-Bit
1012P
1012PG
mb86904
td 232 v8
TAG 257 600
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NEC B1100
Abstract: b1100 nec UPD65031 PD65031 UPD650 MCA600ECL upd65022 UPD65012 upd65051 UPD65006
Text: ADVANCED . INTERCONNECTIONS « Device To PGA Socket Cross Reference 5 Energy Way, P.O. Box 1019, West Warwick, Rl 02893 . Tel. 4 0 1 -8 23 -52 0 0 • FAX 401-823-8723 Device To PGA Socket Cross Reference Altera Device # Footprint # EP1800 EPM 5128 EPM5192
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EP1800
EPM5192
EPM5130
B6010
B2022
B2023
B2020
HD61811Y
HD63450Y10
HD63450Y12
NEC B1100
b1100 nec
UPD65031
PD65031
UPD650
MCA600ECL
upd65022
UPD65012
upd65051
UPD65006
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MB86900
Abstract: No abstract text available
Text: MB86930_ FUJITSU 930 Serles 32-BIT RISC EMBEDDED PROCESSOR May 25,1994 • Included to maximize theperformanceof the system with minimum glue logic, are chip select outputs, program mable wait-state generation and built-in support for a high performance connection to page-mode DRAM. See
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MB86930_
32-BIT
MB86930
25ns/cycle)
QQ10fc
MB86930
208-LEAD
MB86930-20PF-G
Lc75b
MB86900
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Fujitsu MB86900
Abstract: MB86901 MB86900 CV 203 Ox00000010 A31A
Text: FUJITSU MICROELECTRONICS 47E D • 3 7 M cì7bB 0017Sbô 1 «FflI 7=-^-/7-38 « MB86930 PRELIMINARY FUJITSU SPARCIite 32-BIT RISC EMBEDDED PROCESSOR ADVANCE INFORMATION FEATURES 40 MHz 25ns/cycle operating frequency SPARC* high performance RISC architecture
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0017Sbô
MB86930
32-BIT
25ns/cycle)
MB86930-40CR-G
Fujitsu MB86900
MB86901
MB86900
CV 203
Ox00000010
A31A
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Untitled
Abstract: No abstract text available
Text: FUJITSU MB86930_ 930 Seríes 32-BIT RISC EMBEDDED PROCESSOR May 25, 1994 Included to maximize the performance of the system with minimum glue logic, are chip select outputs, program mable wait-state generation and built-in support for a high performance connection to page-mode DRAM. See
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MB86930_
32-BIT
MB86930
MB86930
MB86930-40CR-G
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