TXC-21055
Abstract: JESD22-A112-A PE65966 HDB3 coding
Text: E3RT Device 34 Mbit/s E3 Line Interface TXC-02053 DATA SHEET FEATURES DESCRIPTION • 34368 kbit/s line interface The TranSwitch 34 Mbit/s E3 Receiver/Transmitter Line Interface E3RT is a Bi-CMOS VLSI device that provides the functions needed for terminating the ITU-T
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TXC-02053
TXC-02053-MB
TXC-21055
JESD22-A112-A
PE65966
HDB3 coding
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JT-G703
Abstract: No abstract text available
Text: MRT Device 6-, 8-, 34- Mbit/s Line Interface TXC-02050C DATA SHEET DESCRIPTION • 6312/8448/34368 kbit/s line interface • AGC and equalizer • Line quality monitor 10-6 error rate threshold • Receive loss of signal and transmit loss of clock alarms
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TXC-02050C
44-pin
844ication.
TXC-02050C-MB
JT-G703
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TXC-02054
Abstract: E2 hdb3 TXC-02054-MB uses of 0.1 MICROFARAD ceramic disk TXC-02054AIPL HDB3 nrz e2 1N4148 1N914 74ACT11244 PE-65966
Text: MRTE Device 8-, 34- Mbit/s Line Interface TXC-02054 FEATURES DESCRIPTION • 8448/34368 kbit/s line interface The TranSwitch Multi-rate Receive/Transmit E2/E3 MRTE Line Interface is a CMOS VLSI device that provides the functions needed for terminating two ITU-T
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TXC-02054
TXC-02054-MB
TXC-02054
E2 hdb3
TXC-02054-MB
uses of 0.1 MICROFARAD ceramic disk
TXC-02054AIPL
HDB3 nrz e2
1N4148
1N914
74ACT11244
PE-65966
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txc 24.5
Abstract: E2 hdb3 TXC-21055 1N4148 1N914 AN-517 PE-65966 TXC-02050C ME502B A2917
Text: MRT Device 6-, 8-, 34- Mbit/s Line Interface TXC-02050C FEATURES DESCRIPTION • 6312/8448/34368 kbit/s line interface The TranSwitch Multi-rate Receive/Transmit MRT Line Interface is a CMOS VLSI device that provides the functions needed for terminating two ITU-T line rates,
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TXC-02050C
TXC-02050C-MB
txc 24.5
E2 hdb3
TXC-21055
1N4148
1N914
AN-517
PE-65966
TXC-02050C
ME502B
A2917
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JT-G703
Abstract: 1N4148 1N914 AN-517 PE-65966 PE-65969 TXC-02050C HDB3 coding EQB-0
Text: Proprietary TranSwitch Corporation Information for use Solely by its Customers MRT TXC-02050C DATA SHEET BLOCK DIAGRAM LINE SIDE TERMINAL SIDE EQB1 EQB0 LOW VAGC GNDA AGFIL RXLOS VCOC PLLC PNENB RXDIS + RP/RD HDB3 - RN Decoder clk + DI1 DI2 Equalization Network
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TXC-02050C
TXC-02050C
TXC-02050C-M
TXC-02050C-MB
JT-G703
1N4148
1N914
AN-517
PE-65966
PE-65969
HDB3 coding
EQB-0
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Untitled
Abstract: No abstract text available
Text: MRT Device 6-, 8-, 34- Mbit/s Line Interface TXC-02050C FEATURES DESCRIPTION • 6312/8448/34368 kbit/s line interface The TranSwitch Multi-rate Receive/Transmit MRT Line Interface is a CMOS VLSI device that provides the functions needed for terminating two ITU-T line rates,
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TXC-02050C
TXC-02050C-MB
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DUXBURY
Abstract: No abstract text available
Text: » C llf lT # ^ L I@ ^ 1 /1 / I I I E3RT Device .W 34 Mbit/s E3 Line Interface TXC-02053 - DATA SHEET DESCRIPTION FEATURES • 34368 kbit/s line interface • 22 dB input dynamic range 100 mVp to 1.2 Vp • Fully differential receiver input for noise immunity
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OCR Scan
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PDF
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TXC-02053
TXC-02053-CIPL
44-pin
TXC-03701
751/G
742/G
TXC-06125
TXC-21055
TXC-02053-MB
DUXBURY
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ME502B
Abstract: circuit inter CV 203 DUXBURY
Text: E3RT Device m A l / l / I T 34 Mbit/s E3 Line Interface TXC-02053 f . H — DATA SHEET DESCRIPTION FEATURES • 34368 kbit/s line interface • 22 dB input dynamic range 100 mVp to 1.2 Vp • Fully differential receiver input for noise immunity • AGC and adaptive equalizer for 0-1300 feet of
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OCR Scan
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PDF
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TXC-02053
TXC-02053-MB
ME502B
circuit inter CV 203
DUXBURY
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