MNA196 Search Results
MNA196 Datasheets Context Search
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74LV374
Abstract: 74HC374 74HCT374 74LV374D 74LV374N DIP20 JESD22-A114E SO20 SSOP20
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74LV374 74LV374 74HC374 74HCT374. 74HCT374 74LV374D 74LV374N DIP20 JESD22-A114E SO20 SSOP20 | |
MNA196
Abstract: CP/2012
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74ABT374A 74ABT374A MNA196 CP/2012 | |
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74AHC374; 74AHCT374 Octal D-type flip-flop; positive edge-trigger; 3-state Product specification File under Integrated Circuits, IC06 1998 Dec 11 Philips Semiconductors Product specification Octal D-type flip-flop; positive edge-trigger; |
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74AHC374; 74AHCT374 EIA/JESD22-A114-A EIA/JESD22-A115-A SCA60 245106/00/01/pp20 | |
74AHC374D
Abstract: 74AHC374 74AHC374PW 74AHCT374 74AHCT374D
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74AHC374; 74AHCT374 EIA/JESD22-A114-A EIA/JESD22-A115-A EIA/JESD22-C101 74AHC/AHCT374 245002/02/pp20 74AHC374D 74AHC374 74AHC374PW 74AHCT374 74AHCT374D | |
Contextual Info: 74LVT374 3.3 V octal D-type flip-flop; 3-state Rev. 4 — 22 November 2011 Product data sheet 1. General description The 74LVT374 is a high-performance product designed for VCC operation at 3.3 V. This device is an 8-bit, edge triggered register coupled to eight 3-state output buffers. The |
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74LVT374 74LVT374 | |
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC374A Octal D-type flip-flop with 5 Volt tolerant inputs/outputs; positive edge-trigger; 3-state Product specification Supersedes data of 1998 Jul 29 File under Integrated Circuits, IC24 2002 Nov 04 Philips Semiconductors |
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74LVC374A | |
Contextual Info: 74LVC374A Octal D-type flip-flop; 5 V tolerant inputs/outputs; positive-edge trigger; 3-state Rev. 3 — 6 December 2012 Product data sheet 1. General description The 74LVC374A is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A clock input CP and an |
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74LVC374A 74LVC374A | |
Contextual Info: 74LVC374A-Q100 Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state Rev. 1 — 22 November 2012 Product data sheet 1. General description The 74LVC374A-Q100 is an octal D-type flip-flop featuring separate D-type inputs for |
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74LVC374A-Q100 74LVC374A-Q100 74LVC374A | |
SSOP20
Abstract: 74LVC374A 74LVC374ABQ 74LVC374AD 74LVC374ADB 74LVC374APW 74LVC574A SO20 MNB001
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74LVC374A 74LVC374A SCA75 613508/02/pp24 SSOP20 74LVC374ABQ 74LVC374AD 74LVC374ADB 74LVC374APW 74LVC574A SO20 MNB001 | |
74ALVC374
Abstract: 74ALVC374D 74ALVC374PW 74ALVC574 JESD22-A114E SO20
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74ALVC374 74ALVC374 74ALVC374D 74ALVC374PW 74ALVC574 JESD22-A114E SO20 | |
74ALVC374
Abstract: 74ALVC374D 74ALVC374PW
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74ALVC374 74ALVC374 JESD8B/JESD36 SCA74 613508/01/pp20 74ALVC374D 74ALVC374PW | |
CP/2014Contextual Info: 74AHC374-Q100; 74AHCT374-Q100 Octal D-type flip-flop; positive edge-trigger; 3-state Rev. 1 — 11 March 2014 Product data sheet 1. General description The 74AHC374-Q100; 74AHCT374-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with |
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74AHC374-Q100; 74AHCT374-Q100 74AHCT374-Q100 AHCT374 CP/2014 | |
74AHC374
Abstract: 74AHC374D 74AHC374PW 74AHCT374 74AHCT374D 74AHCT374PW SO20
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74AHC374; 74AHCT374 74AHCT374 AHCT374 74AHC374 74AHC374D 74AHC374PW 74AHCT374D 74AHCT374PW SO20 | |
Contextual Info: 74LVT374 3.3 V octal D-type flip-flop; 3-state Rev. 3 — 14 September 2011 Product data sheet 1. General description The 74LVT374 is a high-performance product designed for VCC operation at 3.3 V. This device is an 8-bit, edge triggered register coupled to eight 3-state output buffers. The |
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74LVT374 74LVT374 |