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    MS-012AB PACKAGE Search Results

    MS-012AB PACKAGE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TPH9R00CQH Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 150 V, 64 A, 0.009 Ohm@10V, SOP Advance / SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation
    TPH2R408QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 120 A, 0.00243 Ohm@10V, SOP Advance Visit Toshiba Electronic Devices & Storage Corporation
    XPH2R106NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 110 A, 0.0021 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    XPH3R206NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 70 A, 0.0032 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    TPH4R008QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 86 A, 0.004 Ohm@10V, SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation

    MS-012AB PACKAGE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    MS-012-AB

    Abstract: MS-012AB MS-012AB Package MS-012AA MS-012AC
    Text: Q QUALITY SEMICONDUCTOR, INC. Selection Guide and Packaging Information 150-MIL SOIC - Package Code S1 Plastic Small Outline Gull-Wing 1 E H N D SEATING PLANE A B e JEDEC# h x 45° L α A1 MS-012AA MS-012AB C MS-012AC Symbol Min Nom Max Min Nom Max Min Nom


    Original     		PDF 150-MIL MS-012AA MS-012AB MS-012AC MS-012-AB MS-012AB MS-012AB Package MS-012AA MS-012AC

    MS-012-AB

    Abstract: 14P2P-A SOP14-P-225-1 MS-012AB
    Text: 14P2P-A Plastic 14pin 225mil SOP EIAJ Package Code SOP14-P-225-1.27 JEDEC Code MS-012AB Weight g 0.12 Lead Material Cu Alloy e 8 1 7 E Recommended Mount Pad F A Symbol D A2 A1 b y L e L1 HE e1 I2 14 b2 c Detail F A A1 A2 b c D E e HE L L1 y b2 e1 I2 Dimension in Millimeters


    Original     		PDF 14P2P-A 14pin 225mil OP14-P-225-1 MS-012AB MS-012-AB 14P2P-A SOP14-P-225-1 MS-012AB

    IN7407N

    Abstract: IN7407
    Text: TECHNICAL DATA IN7407 Hex Buffers/Drivers with OpenCollector High-Voltage Outputs LOGIC DIAGRAM ORDERING INFORMATION IN7407N Plastic IN7407D SOIC TA = -10° to 70° C for all packages PIN ASSIGNMENT FUNCTION TABLE PIN 14 =VCC PIN 7 = GND Inputs Output A Y


    Original     		PDF IN7407 IN7407N IN7407D 012AB) IN7407

    in744

    Abstract: 1N3064 1N916 IN7440
    Text: TECHNICAL DATA IN7440 Dual 4-Input Positive-NAND Buffers LOGIC DIAGRAM ORDERING INFORMATION IN7440N Plastic IN7440D SOIC TA = -10° to 70° C for all packages PIN ASSIGNMENT PIN 14 =VCC PIN 7 = GND NC - No internal connection FUNCTION TABLE Inputs Output A


    Original     		PDF IN7440 IN7440N IN7440D 012AB) in744 1N3064 1N916 IN7440

    KK74LS04

    Abstract: KK74LS04D KK74LS04N
    Text: TECHNICAL DATA KK74LS04 Hex Inverters This device contains six independent inverts. It performs the Boolean function Y=A. ORDERING INFORMATION KK74LS04N Plastic KK74LS04D SOIC TA = -0° to 70° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE


    Original     		PDF KK74LS04 KK74LS04N KK74LS04D 012AB) KK74LS04

    1N3064

    Abstract: 1N916 KK7440 KK7440D KK7440N
    Text: TECHNICAL DATA KK7440 Dual 4-Input Positive-NAND Buffers LOGIC DIAGRAM ORDERING INFORMATION KK7440N Plastic KK7440D SOIC TA = -10° to 70° C for all packages PIN ASSIGNMENT PIN 14 =VCC PIN 7 = GND NC - No internal connection FUNCTION TABLE Inputs Output A


    Original     		PDF KK7440 KK7440N KK7440D 012AB) 1N3064 1N916 KK7440

    IN74LS04N

    Abstract: IN74LS04
    Text: TECHNICAL DATA IN74LS04 Hex Inverters This device contains six independent inverts. It performs the Boolean function Y=A. ORDERING INFORMATION IN74LS04N Plastic IN74LS04D SOIC TA = -0° to 70° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE


    Original     		PDF IN74LS04 IN74LS04N IN74LS04D 012AB) IN74LS04

    KK7407

    Abstract: KK7407D KK7407N
    Text: TECHNICAL DATA KK7407 Hex Buffers/Drivers with OpenCollector High-Voltage Outputs LOGIC DIAGRAM ORDERING INFORMATION KK7407N Plastic KK7407D SOIC TA = -10° to 70° C for all packages PIN ASSIGNMENT FUNCTION TABLE PIN 14 =VCC PIN 7 = GND Inputs Output A Y


    Original     		PDF KK7407 KK7407N KK7407D 012AB) KK7407

    1N3064

    Abstract: 1N916
    Text: TECHNICAL DATA IN74180 9-Bit ODD/EVEN Parity Generators/Checkers ORDERING INFORMATION IN74180N Plastic IN74180D SOIC TA = -10° to 70° C for all packages LOGIC DIAGRAM PIN ASSIGNMENT PIN 14 =VCC PIN 7 = GND FUNCTION TABLE Inputs Σ of H’s at EVEN A Thru H


    Original     		PDF IN74180 IN74180N IN74180D 012AB) 1N3064 1N916

    1N3064

    Abstract: 1N916 IN74LS86D IN74LS86N
    Text: TECHNICAL DATA IN74LS86 Quad 2-Input Exclusive OR Gate This device contains four independent 2-input Exclusive-OR gates. It performs the Boolean functions Y=A ⊕ B=AB+AB in positive logic. ORDERING INFORMATION IN74LS86N Plastic IN74LS86D SOIC TA = 0° to 70° C for all packages


    Original     		PDF IN74LS86 IN74LS86N IN74LS86D 012AB) 1N3064 1N916

    1N3064

    Abstract: 1N916 KK74LS86 KK74LS86D KK74LS86N
    Text: TECHNICAL DATA KK74LS86 Quad 2-Input Exclusive OR Gate This device contains four independent 2-input Exclusive-OR gates. It performs the Boolean functions Y=A ⊕ B=AB+AB in positive logic. ORDERING INFORMATION KK74LS86N Plastic KK74LS86D SOIC TA = 0° to 70° C for all packages


    Original     		PDF KK74LS86 KK74LS86N KK74LS86D 012AB) 1N3064 1N916 KK74LS86

    1N3064

    Abstract: 1N916 KK74180 KK74180D KK74180N
    Text: TECHNICAL DATA KK74180 9-Bit ODD/EVEN Parity Generators/Checkers ORDERING INFORMATION KK74180N Plastic KK74180D SOIC TA = -10° to 70° C for all packages LOGIC DIAGRAM PIN ASSIGNMENT PIN 14 =VCC PIN 7 = GND FUNCTION TABLE Inputs Σ of H’s at EVEN A Thru H


    Original     		PDF KK74180 KK74180N KK74180D 012AB) 1N3064 1N916 KK74180

    IN747

    Abstract: 1N3064 1N916
    Text: TECHNICAL DATA IN7472 AND-Gated J-K Master-Slave FlipFlops with Reset and Clear LOGIC DIAGRAM ORDERING INFORMATION IN7472N Plastic IN7472D SOIC TA = -10° to 70° C for all packages PIN ASSIGNMENT PIN 14 =VCC PIN 7 = GND NC - No internal connection FUNCTION TABLE


    Original     		PDF IN7472 IN7472N IN7472D 012AB) IN747 1N3064 1N916

    KK4002B

    Abstract: KK4002BD KK4002BN
    Text: TECHNICAL DATA KK4002B Dual 4-Input NOR Gate High-Voltage Silicon-Gate CMOS The KK4002B NOR gates provide the system designer with direct emplementation of the NOR function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature


    Original     		PDF KK4002B KK4002B KK4002BN KK4002BD 012AB)

    IW4025BD

    Abstract: IW4025BN
    Text: TECHNICAL DATA IW4025B Triple 3-Input NOR Gate High-Voltage Silicon-Gate CMOS The IW4025B NOR gates provide the system designer with direct emplementation of the NOR function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature


    Original     		PDF IW4025B IW4025B IW4025BN IW4025BD 012AB)

    KK4071B

    Abstract: KK4071BD KK4071BN
    Text: TECHNICAL DATA KK4071B Quad 2-Input OR Gate High-Voltage Silicon-Gate CMOS The KK4071B OR gates provide the system designer wich direct emplementation of the positive-logic OR function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature


    Original     		PDF KK4071B KK4071B KK4071BN KK4071BD 012AB)

    1N3064

    Abstract: 1N916 KK7472 KK7472D KK7472N
    Text: TECHNICAL DATA KK7472 AND-Gated J-K Master-Slave FlipFlops with Reset and Clear LOGIC DIAGRAM ORDERING INFORMATION KK7472N Plastic KK7472D SOIC TA = -10° to 70° C for all packages PIN ASSIGNMENT PIN 14 =VCC PIN 7 = GND NC - No internal connection FUNCTION TABLE


    Original     		PDF KK7472 KK7472N KK7472D 012AB) 1N3064 1N916 KK7472

    KK4081B

    Abstract: KK4081BD KK4081BN
    Text: TECHNICAL DATA KK4081B Quad 2-Input AND Gate High-Voltage Silicon-Gate CMOS The KK4081B AND gates provide the system designer with direct emplementation of the AND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature


    Original     		PDF KK4081B KK4081B KK4081BN KK4081BD 012AB)

    KK4011B

    Abstract: KK4011BD KK4011BN
    Text: TECHNICAL DATA KK4011B Quad 2-Input NAND Gate High-Voltage Silicon-Gate CMOS The KK4011B NAND gates provide the system designer with direct emplementation of the NAND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature


    Original     		PDF KK4011B KK4011B KK4011BN KK4011BD 012AB)

    IW4081BD

    Abstract: IW4081BN
    Text: TECHNICAL DATA IW4081B Quad 2-Input AND Gate High-Voltage Silicon-Gate CMOS The IW4081B AND gates provide the system designer with direct emplementation of the AND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 A at 18 V over full package-temperature


    Original     		PDF IW4081B IW4081B IW4081BN IW4081BD 012AB)

    KK4025B

    Abstract: KK4025BD KK4025BN
    Text: TECHNICAL DATA KK4025B Triple 3-Input NOR Gate High-Voltage Silicon-Gate CMOS The KK4025B NOR gates provide the system designer with direct emplementation of the NOR function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature


    Original     		PDF KK4025B KK4025B KK4025BN KK4025BD 012AB)

    IW4023BN

    Abstract: IW4023BD
    Text: TECHNICAL DATA IW4023B Triple 3-Input NAND Gate High-Voltage Silicon-Gate CMOS The IW4023B NAND gates provide the system designer with direct emplementation of the NAND function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 A at 18 V over full package-temperature


    Original     		PDF IW4023B IW4023B IW4023BN IW4023BD 012AB)

    KK4001B

    Abstract: KK4001BD KK4001BN
    Text: TECHNICAL DATA KK4001B Quad 2-Input NOR Gate High-Voltage Silicon-Gate CMOS The KK4001B NOR gates provide the system designer with direct emplementation of the NOR function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature


    Original     		PDF KK4001B KK4001B KK4001BN KK4001BD 012AB)

    IW4071B

    Abstract: IW4071BD IW4071BN
    Text: TECHNICAL DATA IW4071B Quad 2-Input OR Gate High-Voltage Silicon-Gate CMOS The IW4071B OR gates provide the system designer wich direct emplementation of the positive-logic OR function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 A at 18 V over full package-temperature


    Original     		PDF IW4071B IW4071B IW4071BN IW4071BD 012AB)