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    NT5CC256M8 Price and Stock

    Nanya Technology Corporation NT5CC256M8IN-DI

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    Bristol Electronics NT5CC256M8IN-DI 152
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    Nanya Technology Corporation NT5CC256M8INDI

    DDR3L 2GBIT SDRAM DDR3L DRAM, 256MX8, 0.225ns, CMOS, PBGA78
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    ComSIT USA NT5CC256M8INDI 43
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    Nanya Technology Corporation NT5CC256M8JQ-EKI

    DDR3-1866 256Mx8 (2Gb) Ind 1.35V
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Win Source Electronics NT5CC256M8JQ-EKI 15,500
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    NT5CC256M8 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    NT5CC128M16FP

    Abstract: No abstract text available
    Text: 2Gb DDR3 L SDRAM F-Die NT5CB256M8FN / NT5CB128M16FP NT5CC256M8FN / NT5CC128M16FP Options Features  Differential clock input (CK, ) Speeds  Differential bidirectional data strobe  DDR3 - 2133 1,2  TDQS and /TDQS pair for X8  DDR3 - 1866


    Original     		PDF NT5CB256M8FN NT5CB128M16FP NT5CC256M8FN NT5CC128M16FP P93-124 P148-158 NT5CC128M16FP

    NT5CB256M8DN

    Abstract: NT5CB256m tl 555 c "2Gb DDR3 SDRAM" NT5CB256M8 NT5CB256 NT5CC256M8 NT5CC256
    Text: 2Gb DDR3 SDRAM D-Die NT5CB512M4DN / NT5CB256M8DN NT5CC512M4DN / NT5CC256M8DN Feature  1.5V ± 0.075V / 1.35V -0.0675V/+0.1V JEDEC Standard Power Supply  Output Driver Impedance Control  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		PDF NT5CB512M4DN NT5CB256M8DN NT5CC512M4DN NT5CC256M8DN 78-Ball Rate32dex 78Balls NT5CB256m tl 555 c "2Gb DDR3 SDRAM" NT5CB256M8 NT5CB256 NT5CC256M8 NT5CC256

    NT5CB256M8GN

    Abstract: NT5CC256M8GN NT5CB256M8GN-DI NT5CC256M8GN-D NT5CC512M4GN NT5CC512M4GN-CG NT5CB256M8GN-CG "2Gb DDR3 SDRAM" NT5C NT5CB256M8
    Text: 2Gb DDR3 SDRAM G-Die NT5CB512M4GN / NT5CB256M8GN NT5CC512M4GN / NT5CC256M8GN Feature  VDD = VDDQ = 1.5V ± 0.075V JEDEC Standard  Programmable Burst Length: 4, 8 Power Supply  8n-bit prefetch architecture VDD = VDDQ = 1.35V -0.0675V/+0.1V  Output Driver Impedance Control


    Original     		PDF NT5CB512M4GN NT5CB256M8GN NT5CC512M4GN NT5CC256M8GN 78Balls NT5CC256M8GN NT5CB256M8GN-DI NT5CC256M8GN-D NT5CC512M4GN-CG NT5CB256M8GN-CG "2Gb DDR3 SDRAM" NT5C NT5CB256M8

    NT5CC256

    Abstract: No abstract text available
    Text: 2Gb DDR3 SDRAM D-Die NT5CB512M4DN / NT5CB256M8DN NT5CC512M4DN / NT5CC256M8DN Feature  1.5V ± 0.075V / 1.35V -0.0675V/+0.1V JEDEC Standard Power Supply  Output Driver Impedance Control  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		PDF NT5CB512M4DN NT5CB256M8DN NT5CC512M4DN NT5CC256M8DN NT5CC256

    Untitled

    Abstract: No abstract text available
    Text: 2Gb DDR3 L SDRAM F-Die NT5CB256M8FN / NT5CB128M16FP NT5CC256M8FN / NT5CC128M16FP Options Features  Differential clock input (CK, ) Speeds  Differential bidirectional data strobe  DDR3 - 2133 2,3  TDQS and /TDQS pair for X8  DDR3 - 1866


    Original     		PDF NT5CB256M8FN NT5CB128M16FP NT5CC256M8FN NT5CC128M16FP P147-150, NT5CC128M16FP-DIA NT5CC128M16FP-DIH

    Untitled

    Abstract: No abstract text available
    Text: 2Gb DDR3 SDRAM F-Die NT5CB256M8FN/NT5CB128M16FP NT5CC256M8FN/NT5CC128M16FP Feature CAS Latency Frequency Speed Bins -DI/DII* -EJ*/EJI* -FK* DDR3 L -1600 DDR3-1866 DDR3-2133 CL11 CL12 CL13 Units Parameter Min. Max. Min. Max. Min. Max. tCK(Avg.) Clock Frequency


    Original     		PDF NT5CB256M8FN/NT5CB128M16FP NT5CC256M8FN/NT5CC128M16FP DDR3-1866 DDR3-2133 x8/78

    NT5CB128m16FP

    Abstract: nt5cb256m8fn NT5CB128M16FP-DI NT5CB128M16FP-EK NT5CC128M16FP-DI NT5CC256M8FN-DI NT5CC128M16FP NT5CC256M8FN-DII NT5CB256M8FN-FL NT5CB256M8F
    Text: 2Gb DDR3 SDRAM F-Die NT5CB256M8FN / NT5CB128M16FP NT5CC256M8FN / NT5CC128M16FP Feature   Programmable Burst Length: 4, 8  8n-bit prefetch architecture  Output Driver Impedance Control Backward compatible to VDD= VDDQ= 1.5V  Differential bidirectional data strobe


    Original     		PDF NT5CB256M8FN NT5CB128M16FP NT5CC256M8FN NT5CC128M16FP x8/78 NT5CB128M16FP-DI NT5CB128M16FP-EK NT5CC128M16FP-DI NT5CC256M8FN-DI NT5CC128M16FP NT5CC256M8FN-DII NT5CB256M8FN-FL NT5CB256M8F

    NT5CC256

    Abstract: NT5CB256M8GN- CG
    Text: 2Gb DDR3 SDRAM G-Die NT5CB512M4GN / NT5CB256M8GN NT5CC512M4GN / NT5CC256M8GN Feature  1.35V -0.0675V/+0.1V & 1.5V ± 0.075V JEDEC  Output Driver Impedance Control Standard Power Supply  Differential bidirectional data strobe  8 Internal memory banks (BA0- BA2)


    Original     		PDF NT5CB512M4GN NT5CB256M8GN NT5CC512M4GN NT5CC256M8GN 78Balls NT5CC256 NT5CB256M8GN- CG

    NT5CB256M8bN-cg

    Abstract: calibration of dvm specifications NT5CB128M16BP-DI
    Text: 2Gb DDR3 SDRAM NT5CB256M8BN/NT5CB128M16BP NT5CC256M8BN/NT5CC128M16BP Feature Table 1: CAS Latency Frequency -BE* -CG/CGI* -DI* -EJ* DDR3 L -1066-CL7 DDR3 (L)-1333-CL9 DDR3(L)-1600-CL11 Speed Bins Units DDR3-1866-CL12 Parameter Min. Max. Min. Max. Min. Max.


    Original     		PDF NT5CB256M8BN/NT5CB128M16BP NT5CC256M8BN/NT5CC128M16BP -1066-CL7 -1333-CL9 -1600-CL11 DDR3-1866-CL12 DDR3-1600 DDR3-1866 NT5CB256M8bN-cg calibration of dvm specifications NT5CB128M16BP-DI

    NT5CB128M16FP

    Abstract: NT5CB128M16FP-DI NT5CC128M16FP-DI NT5CB128M NT5CB128M16FP-DII NT5CC256M8FN
    Text: 2Gb DDR3 SDRAM F-Die NT5CB256M8FN/NT5CB128M16FP NT5CC256M8FN/NT5CC128M16FP Feature CAS Latency Frequency Speed Bins -DI/DII* -EJ/EJI* -FK* DDR3 L -1600 DDR3-1866 DDR3-2133 CL11 CL12 CL13 Units Parameter Min. Max. Min. Max. Min. Max. tCK(Avg.) Clock Frequency


    Original     		PDF NT5CB256M8FN/NT5CB128M16FP NT5CC256M8FN/NT5CC128M16FP DDR3-1866 DDR3-2133 155es x8/78 NT5CB128M16FP NT5CB128M16FP-DI NT5CC128M16FP-DI NT5CB128M NT5CB128M16FP-DII NT5CC256M8FN

    Untitled

    Abstract: No abstract text available
    Text: NT5CB256M8FN/NT5CB128M16FP NT5CC256M8FN/NT5CC128M16FP 2Gb DDR3 SDRAM F-Die Feature


    Original     		PDF NT5CB256M8FN/NT5CB128M16FP NT5CC256M8FN/NT5CC128M16FP -1066-CL7 -1333-CL9 -1600-CL11 DDR3-1866-CL12

    NT5CB128M16BP-DI

    Abstract: NT5CB256M8 nt5cb128m16 NT5CC128M16BP NT5CB256M8BN NT5CB512M4BN NT5CB128M NT5CB256M8BN-DI NT5CB128 NT5CC256
    Text: 2Gb DDR3 SDRAM B-Die NT5CB512M4BN / NT5CB256M8BN / NT5CB128M16BP NT5CC512M4BN / NT5CC256M8BN / NT5CC128M16BP Feature  1.5V ± 0.075V / 1.35V -0.0675V/+0.1V JEDEC Standard Power Supply  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		PDF NT5CB512M4BN NT5CB256M8BN NT5CB128M16BP NT5CC512M4BN NT5CC256M8BN NT5CC128M16BP 78-Ball 96-Ball NT5CB128M16BP-DI NT5CB256M8 nt5cb128m16 NT5CC128M16BP NT5CB128M NT5CB256M8BN-DI NT5CB128 NT5CC256

    nt5cb128m16

    Abstract: NT5CB128M16BP-CGI
    Text: NT5CB256M8BN/NT5CB128M16BP NT5CC256M8BN/NT5CC128M16BP 2Gb DDR3 SDRAM B-Die Feature Table 1: CAS Latency Frequency Speed Bins -BE* -CG/CGI* -DI* -EJ* DDR3 L -1066-CL7 DDR3 (L)-1333-CL9 DDR3(L)-1600-CL11 DDR3-1866-CL12 Units Parameter Min. Max. Min. Max. Min.


    Original     		PDF NT5CB256M8BN/NT5CB128M16BP NT5CC256M8BN/NT5CC128M16BP -1066-CL7 78-Balls 96-Balls nt5cb128m16 NT5CB128M16BP-CGI

    DDR3-1866-CL12

    Abstract: NT5CB256M8GN-DI
    Text: 2Gb DDR3 SDRAM G-Die NT5CB256M8GN / NT5CC256M8GN Feature Table 1: CAS Latency Frequency Speed Bins -BE* -CG/CGI* -DI* -EJ* DDR3 L -1066-CL7 DDR3 (L)-1333-CL9 DDR3(L)-1600-CL11 Units DDR3-1866-CL12 Parameter Min. Max. Min. Max. Min. Max. Min. Max. tCK(Avg.)


    Original     		PDF NT5CB256M8GN NT5CC256M8GN -1066-CL7 -1333-CL9 -1600-CL11 DDR3-1866-CL12 NT5CB256M8GN-DI

    NT5CC256

    Abstract: NT5CB128M16FP
    Text: 2Gb DDR3 L SDRAM F-Die NT5CB256M8FN / NT5CB128M16FP NT5CC256M8FN / NT5CC128M16FP Options Features  Differential clock input (CK, ) Speeds  Differential bidirectional data strobe  DDR3 - 2133 2,3  TDQS and /TDQS pair for X8  DDR3 - 1866


    Original     		PDF NT5CB256M8FN NT5CB128M16FP NT5CC256M8FN NT5CC128M16FP P146-156 P137-143 P124-136 P92-123 NT5CC256 NT5CB128M16FP

    NT5CB128M16FP-DI

    Abstract: NT5CC128M16FP-DI NT5CB128M16FP-DII NT5CB256M8FN-DI NT5CC256M8FN-DI NT5CB128M16FP-EJ NT5CB128M16FP nt5cb128m16 NT5CB128 NT5CC128M-16FP-DI
    Text: 2Gb DDR3 SDRAM F-Die NT5CB256M8FN/NT5CB128M16FP NT5CC256M8FN/NT5CC128M16FP Feature CAS Latency Frequency Speed Bins -DI/DII* -EJ*/EJI* -FK* DDR3 L -1600 DDR3-1866 DDR3-2133 CL11 CL12 CL13 Units Parameter Min. Max. Min. Max. Min. Max. tCK(Avg.) Clock Frequency


    Original     		PDF NT5CB256M8FN/NT5CB128M16FP NT5CC256M8FN/NT5CC128M16FP DDR3-1866 DDR3-2133 x8/78 NT5CB128M16FP-DI NT5CC128M16FP-DI NT5CB128M16FP-DII NT5CB256M8FN-DI NT5CC256M8FN-DI NT5CB128M16FP-EJ NT5CB128M16FP nt5cb128m16 NT5CB128 NT5CC128M-16FP-DI

    "2Gb DDR3 SDRAM"

    Abstract: NT5CB256M8BN
    Text: 2Gb DDR3 SDRAM B-Die NT5CB512M4BN / NT5CB256M8BN / NT5CB128M16BP NT5CC512M4BN / NT5CC256M8BN / NT5CC128M16BP Feature  1.5V ± 0.075V / 1.35V +0.0675V/-0.1V JEDEC Standard Power Supply  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		PDF NT5CB512M4BN NT5CB256M8BN NT5CB128M16BP NT5CC512M4BN NT5CC256M8BN NT5CC128M16BP 675V/-0 78-Ball 96-Ball "2Gb DDR3 SDRAM"

    NT5CC128M16FP-DII

    Abstract: No abstract text available
    Text: 2Gb DDR3 SDRAM F-Die NT5CB256M8FN / NT5CB128M16FP NT5CC256M8FN / NT5CC128M16FP Feature   Programmable Burst Length: 4, 8  8n-bit prefetch architecture  Output Driver Impedance Control Backward compatible to VDD= VDDQ= 1.5V  Differential bidirectional data strobe


    Original     		PDF NT5CB256M8FN NT5CB128M16FP NT5CC256M8FN NT5CC128M16FP NT5CC128M16FP-DII

    Untitled

    Abstract: No abstract text available
    Text: 2Gb DDR3 SDRAM B-Die NT5CB512M4BN / NT5CB256M8BN / NT5CB128M16BP NT5CC512M4BN / NT5CC256M8BN / NT5CC128M16BP Feature  1.5V ± 0.075V / 1.35V -0.0675V/+0.1V JEDEC Standard Power Supply  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		PDF NT5CB512M4BN NT5CB256M8BN NT5CB128M16BP NT5CC512M4BN NT5CC256M8BN NT5CC128M16BP 78-Ball

    Untitled

    Abstract: No abstract text available
    Text: 2Gb DDR3 SDRAM D-Die NT5CB512M4DN / NT5CB256M8DN NT5CC512M4DN / NT5CC256M8DN Feature  1.5V ± 0.075V / 1.35V +0.0675V/-0.1V JEDEC Standard Power Supply  Output Driver Impedance Control  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		PDF NT5CB512M4DN NT5CB256M8DN NT5CC512M4DN NT5CC256M8DN 675V/-0

    Untitled

    Abstract: No abstract text available
    Text: 2Gb DDR3 SDRAM B-Die NT5CB512M4BN / NT5CB256M8BN / NT5CB128M16BP NT5CC512M4BN / NT5CC256M8BN / NT5CC128M16BP Feature  1.5V ± 0.075V / 1.35V -0.0675V/+0.1V JEDEC Standard Power Supply  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		PDF NT5CB512M4BN NT5CB256M8BN NT5CB128M16BP NT5CC512M4BN NT5CC256M8BN NT5CC128M16BP 78-Ball

    nt5cb128m16

    Abstract: NT5CB256M8 NT5CC256M8BN NT5CB128M16BP-CG NT5CB128M16BP NT5CC128M16BP NT5CB256 NT5CB128M16BP-AC NT5CB256M8BN-DI NT5CB256M8bn
    Text: 2Gb DDR3 SDRAM B-Die NT5CB512M4BN / NT5CB256M8BN / NT5CB128M16BP NT5CC512M4BN / NT5CC256M8BN / NT5CC128M16BP Feature  1.5V ± 0.075V / 1.35V -0.0675V/+0.1V JEDEC Standard Power Supply  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		PDF NT5CB512M4BN NT5CB256M8BN NT5CB128M16BP NT5CC512M4BN NT5CC256M8BN NT5CC128M16BP 78-Ball 96-Ball nt5cb128m16 NT5CB256M8 NT5CB128M16BP-CG NT5CC128M16BP NT5CB256 NT5CB128M16BP-AC NT5CB256M8BN-DI

    NT5CB256M8GN-CG

    Abstract: NT5CB256M8GN NT5CC512M4GN-CG NT5CC256M8GN-D NT5CB256M8GN- CG NT5CC256M8GN-DI
    Text: 2Gb DDR3 SDRAM G-Die NT5CB512M4GN / NT5CB256M8GN NT5CC512M4GN / NT5CC256M8GN Feature  VDD = VDDQ = 1.5V ± 0.075V JEDEC Standard  Programmable Burst Length: 4, 8 Power Supply  8n-bit prefetch architecture VDD = VDDQ = 1.35V -0.0675V/+0.1V  Output Driver Impedance Control


    Original     		PDF NT5CB512M4GN NT5CB256M8GN NT5CC512M4GN NT5CC256M8GN 78Balls NT5CB256M8GN-CG NT5CC512M4GN-CG NT5CC256M8GN-D NT5CB256M8GN- CG NT5CC256M8GN-DI

    NT5CB256M8DN

    Abstract: 78balls NT5CB256M8DN-CG NT5CB256
    Text: 2Gb DDR3 SDRAM D-Die NT5CB512M4DN / NT5CB256M8DN NT5CC512M4DN / NT5CC256M8DN Feature  1.5V ± 0.075V / 1.35V -0.0675V/+0.1V JEDEC Standard Power Supply  Output Driver Impedance Control  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)


    Original     		PDF NT5CB512M4DN NT5CB256M8DN NT5CC512M4DN NT5CC256M8DN 78-Ball Rate32dex 78Balls 78balls NT5CB256M8DN-CG NT5CB256