Untitled
Abstract: No abstract text available
Text: CY37256V UltraLogic 3.3V 256-Macrocell ISR™ CPLD — tPD = 12 ns Features — tS = 7.0 ns • 256 macrocells in sixteen logic blocks • 3.3V In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming • • • • • • • •
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CY37256V
256-Macrocell
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37256p
Abstract: CY37256-125 IEEE 1149.1 JTAG CY37256 CY37256P160-125UMB
Text: CY37256 UltraLogic 256-Macrocell ISR™ CPLD Features • • • • • • • • • • 256 macrocells in sixteen logic blocks • In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes
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CY37256
256-Macrocell
160-Lead
208-Lead
37256p
CY37256-125
IEEE 1149.1 JTAG
CY37256
CY37256P160-125UMB
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U208
Abstract: No abstract text available
Text: PRELIMINARY CY37512V UltraLogic 3.3V 512-Macrocell ISR™ CPLD Features For a more detailed description of the architecture and features of the CY37512V see the Ultra37000 Family data sheet. • 512 macrocells in 32 logic blocks • 3.3V In-System Reprogrammable™ ISR™
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CY37512V
512-Macrocell
U208
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tlp 453
Abstract: No abstract text available
Text: fax id: 6151 PRELIMINARY Ultra37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 10 ns Features — tS = 5.5 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — 3.3V ISR • • • • • • • • • — 5V tolerant
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Ultra37192V
192-Macrocell
IEEE1149
tlp 453
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CY37256
Abstract: CY37256V O116
Text: Back PRELIMINARY CY37256V UltraLogic 3.3V 256-Macrocell ISR™ CPLD — tPD = 12 ns Features — tS = 7 ns • 256 macrocells in sixteen logic blocks • 3.3V In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming • • • • •
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CY37256V
256-Macrocell
CY37256
CY37256V
O116
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CY37256
Abstract: CY37256V
Text: PRELIMINARY CY37256V UltraLogic 3.3V 256-Macrocell ISR™ CPLD — tPD = 12 ns Features — tS = 7 ns • 256 macrocells in sixteen logic blocks • 3.3V In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming • • • • • •
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CY37256V
256-Macrocell
CY37256
CY37256V
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160LEAD
Abstract: No abstract text available
Text: fax id: 6140 CY7C375i UltraLogic 128-Macrocell Flash CPLD • Available in 160-pin TQFP, CQFP, and PGA packages Features Functional Description • • • • 128 macrocells in eight logic blocks 128 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology
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CY7C375i
128-Macrocell
160-pin
CY7C375i
FLASH370iTM
FLASH370i
22V10
160LEAD
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CY37512
Abstract: CY37512V
Text: Back PRELIMINARY CY37512V UltraLogic 3.3V 512-Macrocell ISR™ CPLD — tPD = 15 ns Features • 512 macrocells in 32 logic blocks • 3.3V In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes
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CY37512V
512-Macrocell
CY37512
CY37512V
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ULTRA37000
Abstract: No abstract text available
Text: USE ULTRA37000 FOR ALL NEW DESIGNS CY7C375i UltraLogic™ 128-Macrocell Flash CPLD Features • 3.3V or 5.0V I/O operation • Available in 160-pin TQFP, CQFP, and PGA packages • 128 macrocells in eight logic blocks • 128 I/O pins Functional Description
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ULTRA37000TM
CY7C375i
128-Macrocell
160-pin
CY7C375i
FLASH370iTM
FLASH370i
22V10
ULTRA37000
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CERAMIC QUAD FLATPACK CQFP 14 pin
Abstract: CERAMIC QUAD FLATPACK CQFP CERAMIC PIN GRID ARRAY CPGA
Text: fax id: 6140 CY7C375i UltraLogic 128-Macrocell Flash CPLD Features • Available in 160-pin TQFP, CQFP, and PGA packages Functional Description • • • • 128 macrocells in eight logic blocks 128 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology
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CY7C375i
128-Macrocell
160-pin
CY7C375i
FLASH370iTM
FLASH370i
22V10
CERAMIC QUAD FLATPACK CQFP 14 pin
CERAMIC QUAD FLATPACK CQFP
CERAMIC PIN GRID ARRAY CPGA
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Untitled
Abstract: No abstract text available
Text: fax id: 6140 CY7C375i UltraLogic 128-Macrocell Flash CPLD Features Functional Description • • • • 128 macrocells in eight logic blocks 128 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG Interface
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CY7C375i
128-Macrocell
CY7C375i
FLASH370iTM
FLASH370i
22V10
LASH370i
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ULTRA37000
Abstract: 160-Lead
Text: USE ULTRA37000 FOR ALL NEW DESIGNS CY7C375i UltraLogic™ 128-Macrocell Flash CPLD Features • 3.3V or 5.0V I/O operation • Available in 160-pin TQFP, CQFP, and PGA packages • 128 macrocells in eight logic blocks • 128 I/O pins Functional Description
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ULTRA37000TM
CY7C375i
128-Macrocell
160-pin
CY7C375i
FLASH370iTM
FLASH370i
22V10
ULTRA37000
160-Lead
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Untitled
Abstract: No abstract text available
Text: CY7C375i UltraLogic 128-Macrocell Flash CPLD Features Functional Description • • • • 128 macrocells in eight logic blocks 128 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG Interface
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CY7C375i
128-Macrocell
CY7C375i
FLASH370iTM
FLASH370i
22V10
CY7C37or
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208-Lead
Abstract: CY37512 CY37512V CY37512VP208-66NI ultraISR CABLE
Text: PRELIMINARY CY37512V UltraLogic 3.3V 512-Macrocell ISR™ CPLD — tPD = 15 ns Features • 512 macrocells in 32 logic blocks • 3.3V In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes
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CY37512V
512-Macrocell
208-Lead
CY37512
CY37512V
CY37512VP208-66NI
ultraISR CABLE
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CY37256P160-125UMB
Abstract: CY37256P160-83UMB CY37256 CY37256V CY37256-125 CY37256P160-125AI
Text: PRELIMINARY CY37256 UltraLogic 256-Macrocell ISR™ CPLD Features • • • • • • • • • • 256 macrocells in sixteen logic blocks • In-System Reprogrammable ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes
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CY37256
256-Macrocell
256-pin
CY37256P160-125UMB
CY37256P160-83UMB
CY37256
CY37256V
CY37256-125
CY37256P160-125AI
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Untitled
Abstract: No abstract text available
Text: 75i CY7C375i UltraLogic 128-Macrocell Flash CPLD Features Functional Description • • • • 128 macrocells in eight logic blocks 128 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG Interface
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CY7C375i
128-Macrocell
CY7C375i
FLASH370iTM
FLASH370i
22V10
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Untitled
Abstract: No abstract text available
Text: CY7C375i UltraLogic 128-Macrocell Flash CPLD Features Functional Description • • • • 128 macrocells in eight logic blocks 128 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG Interface
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CY7C375i
128-Macrocell
160-pin
CY7C375i
FLASH370iTM
FLASH370i
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Untitled
Abstract: No abstract text available
Text: CY7C375i UltraLogic 128-Macrocell Flash CPLD Features • 3.3V or 5.0V I/O operation • Available in 160-pin TQFP, CQFP, and PGA packages • 128 macrocells in eight logic blocks • 128 I/O pins Functional Description • Five dedicated inputs including 4 clock pins
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CY7C375i
128-Macrocell
160-pin
CY7C375i
FLASH370iTM
FLASH370i
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Untitled
Abstract: No abstract text available
Text: CY37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 12.0 ns Features — tS = 7.0 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — 3.3V ISR • • • • • • • • • — 5V tolerant • 3.3V In-System Reprogrammable™ ISR™
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CY37192V
192-Macrocell
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CY37192
Abstract: CY37192V
Text: PRELIMINARY CY37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 12 ns Features — tS = 7 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — 3.3V ISR • • • • • • • • • — 5V tolerant • 3.3V In-System Reprogrammable™ ISR™
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CY37192V
192-Macrocell
CY37192
CY37192V
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CY37192
Abstract: CY37192V
Text: Back PRELIMINARY CY37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 12 ns Features — tS = 7 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — 3.3V ISR • • • • • • • • • — 5V tolerant • 3.3V In-System Reprogrammable™ ISR™
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CY37192V
192-Macrocell
CY37192
CY37192V
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CY37192
Abstract: CY37192V tlp 453
Text: PRELIMINARY CY37192 UltraLogic 192-Macrocell ISR™ CPLD Features • • • • • • • • • • • 192 macrocells in twelve logic blocks • In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes
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CY37192
192-Macrocell
160-pin
CY37192
CY37192V
tlp 453
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Untitled
Abstract: No abstract text available
Text: CY37192 UltraLogic 192-Macrocell ISR™ CPLD • • • • • • • • • • Features • 192 macrocells in twelve logic blocks • In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes
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CY37192
192-Macrocell
160-Lead
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CY37512
Abstract: CY37512V AE O47 CY37512P208-83UMB
Text: Back PRELIMINARY CY37512 UltraLogic 512-Macrocell ISR™ CPLD Features • 512 macrocells in 32 logic blocks • In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes — Design changes don’t cause timing changes
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CY37512
512-Macrocell
208-pinor
CY37512
CY37512V
AE O47
CY37512P208-83UMB
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