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    lcx14

    Abstract: LCX04 74LCX14 74LCX14M 74LCX14T TSSOP14
    Text: 74LCX14  LOW VOLTAGE CMOS HEX SCHMITT INVERTER WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 6.5 ns MAX. at VCC = 3.0V POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN)


    Original     		PDF 74LCX14 500mA LCX14 LCX04 74LCX14 74LCX14M 74LCX14T TSSOP14

    M54HCT27

    Abstract: M54HCT27F1R M74HCT27 M74HCT27B1R M74HCT27C1R M74HCT27M1R
    Text: M54HCT27 M74HCT27 TRIPLE 3-INPUT NOR GATE . . . . . . . HIGH SPEED tPD = 9 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


    Original     		PDF M54HCT27 M74HCT27 54/74LS27 M54/74HCT27 M54HCT27 M54HCT27F1R M74HCT27 M74HCT27B1R M74HCT27C1R M74HCT27M1R

    M54HC393

    Abstract: M54HC393F1R M74HC393 M74HC393B1R M74HC393C1R M74HC393M1R M74HC393B1 74LS393 equivalent
    Text: M54HC393 M74HC393 DUAL BINARY COUNTER . . . . . . . . HIGH SPEED fMAX = 72 MHz TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


    Original     		PDF M54HC393 M74HC393 54/74LS393 M54HC393F1R M74HC393M1R M74HC393B1R M74HC393C1R M54/74HC393 M54HC393 M54HC393F1R M74HC393 M74HC393B1R M74HC393C1R M74HC393M1R M74HC393B1 74LS393 equivalent

    74HC4078

    Abstract: 4078B M54HC4078 M54HC4078F1R M74HC4078 M74HC4078B1R M74HC4078C1R M74HC4078M1R
    Text: M54HC4078 M74HC4078 8 INPUT NOR/OR GATE . . . . . . . . HIGH SPEED tPD = 13 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


    Original     		PDF M54HC4078 M74HC4078 4078B M54HC4078F1R M74HC4078M1R M74HC4078B1R M74HC4078C1R M54/74HC4078 74HC4078 4078B M54HC4078 M54HC4078F1R M74HC4078 M74HC4078B1R M74HC4078C1R M74HC4078M1R

    74AC20

    Abstract: 74AC20B 74AC20M 74AC20MTR 74AC20TTR TSSOP14
    Text: 74AC20 DUAL 4-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74AC20 74AC20 74AC20B 74AC20ent 74AC20B 74AC20M 74AC20MTR 74AC20TTR TSSOP14

    74LS20 ic

    Abstract: M54HC20 M54HC20F1R M74HC20 M74HC20B1R M74HC20C1R M74HC20M1R 74Ls20 truth table
    Text: M54HC20 M74HC20 DUAL 4-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 8 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


    Original     		PDF M54HC20 M74HC20 54/74LS20 M54HC20F1R M74HC20M1R M74HC20B1R M74HC20C1R M54/74HC20 74LS20 ic M54HC20 M54HC20F1R M74HC20 M74HC20B1R M74HC20C1R M74HC20M1R 74Ls20 truth table

    1271a

    Abstract: 74AC02 74AC02B 74AC02M 74AC02MTR 74AC02TTR TSSOP14
    Text: 74AC02 QUAD 2-INPUT NOR GATE • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.2ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74AC02 74AC02 74AC02B 74AC02ent 1271a 74AC02B 74AC02M 74AC02MTR 74AC02TTR TSSOP14

    OC211

    Abstract: M74HC4066B1 4066B M54HC4066 M54HC4066F1R M74HC4066 M74HC4066B1R M74HC4066C1R M74HC4066M1R CI 74HC4066
    Text: M54HC4066 M74HC4066 QUAD BILATERAL SWITCH . . . . . . . HIGH SPEED tPD = 7 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) LOW ”ON” RESISTANCE RON = 50 Ω (TYP.) AT VCC = 9 V, II/O = 100 µA


    Original     		PDF M54HC4066 M74HC4066 4066B M54HC4066F1R M74HC4066M1R M74HC4066B1R M74HC4066C1R M54/74HC4066 OC211 M74HC4066B1 4066B M54HC4066 M54HC4066F1R M74HC4066 M74HC4066B1R M74HC4066C1R M74HC4066M1R CI 74HC4066

    74LS02 gate diagram

    Abstract: IC 74LS02 M54HCT02 M54HCT02F1R M74HCT02 M74HCT02B1R M74HCT02C1R M74HCT02M1R
    Text: M54HCT02 M74HCT02 QUAD 2-INPUT NOR GATE . . . . . . . HIGH SPEED tPD = 11 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


    Original     		PDF M54HCT02 M74HCT02 54/74LS02 M54/74HCT02 74LS02 gate diagram IC 74LS02 M54HCT02 M54HCT02F1R M74HCT02 M74HCT02B1R M74HCT02C1R M74HCT02M1R

    schematic diagram 24V to 19V converter

    Abstract: converter circuit dc to Dc 2V to 24V SMPS CIRCUIT DIAGRAM 24v DC35V circuit 24v to 19v converter ST3M01D ST3M01DTR STPS320U DC DC INPUT 24V OUTPUT 3,3V 10ma 24V TO 19V
    Text: ST3M01 TRIPLE VOLTAGE REGULATOR • ■ ■ ■ ■ ■ ONLY TWO CELL NEED AS INPUT THREE REGULATED OUTPUT 1 HIGH EFFICENCY PFM DC/DC CONVERTER 3.3V AT 200mA 87% EFFICENCY) 2) VERY LOW NOISE AND VERY LOW DROP VREG (3V AT 20mA) 3) VERY LOW NOISE AAND VERY LOW


    Original     		PDF ST3M01 200mA SO-14 schematic diagram 24V to 19V converter converter circuit dc to Dc 2V to 24V SMPS CIRCUIT DIAGRAM 24v DC35V circuit 24v to 19v converter ST3M01D ST3M01DTR STPS320U DC DC INPUT 24V OUTPUT 3,3V 10ma 24V TO 19V

    74ls72

    Abstract: IC 74hc266 74LS7266 HC266 data sheet IC 74hc266 HC7266 M54HCXXXF1R 74HC266 M74HCXXXC1R M74HCXXXB1R
    Text: M54/74HC266 M54/74HC7266 HC266 QUAD EXCLUSIVE NOR GATE WITH OPEN DRAIN HC7266 QUAD EXCLUSIVE NOR GATE . . . . . . . . HIGH SPEED tPD = 10 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.)


    Original     		PDF M54/74HC266 M54/74HC7266 HC266 HC7266 54/74LS7266 M54HCXXXF1R M74HCXXX1R M74HCXXXB1R M74HCXXXC1R 74ls72 IC 74hc266 74LS7266 data sheet IC 74hc266 M54HCXXXF1R 74HC266 M74HCXXXC1R M74HCXXXB1R

    74LS02 gate diagram

    Abstract: M54HCT02 M54HCT02F1R M74HCT02 M74HCT02B1R M74HCT02C1R M74HCT02M1R
    Text: M54HCT02 M74HCT02 QUAD 2-INPUT NOR GATE . . . . . . . HIGH SPEED tPD = 11 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


    Original     		PDF M54HCT02 M74HCT02 54/74LS02 M54/74HCT02 74LS02 gate diagram M54HCT02 M54HCT02F1R M74HCT02 M74HCT02B1R M74HCT02C1R M74HCT02M1R

    4066B

    Abstract: M54HC4066 M54HC4066F1R M74HC4066 M74HC4066B1R M74HC4066C1R M74HC4066M1R M74HC4066B1
    Text: M54HC4066 M74HC4066 QUAD BILATERAL SWITCH . . . . . . . HIGH SPEED tPD = 7 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) LOW ”ON” RESISTANCE RON = 50 Ω (TYP.) AT VCC = 9 V, II/O = 100 µA


    Original     		PDF M54HC4066 M74HC4066 4066B M54HC4066F1R M74HC4066M1R M74HC4066B1R M74HC4066C1R M54/74HC4066 4066B M54HC4066 M54HC4066F1R M74HC4066 M74HC4066B1R M74HC4066C1R M74HC4066M1R M74HC4066B1

    M54HC280

    Abstract: M54HC280F1R M74HC280 M74HC280B1R M74HC280C1R M74HC280M1R 74hc280
    Text: M54HC280 M74HC280 9 BIT PARITY GENERATOR . . . . . . . . HIGH SPEED tPD = 22 ns TYP. at VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA = 25 °C 6 V HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


    Original     		PDF M54HC280 M74HC280 54/74LS280 M54HC280F1R M74HC280M1R M74HC280B1R M74HC280C1R M54/74HC280 M54HC280 M54HC280F1R M74HC280 M74HC280B1R M74HC280C1R M74HC280M1R 74hc280

    74LVQ00

    Abstract: 74LVQ00M 74LVQ00T TSSOP14
    Text: 74LVQ00  QUAD 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.5 ns TYP. at VCC = 3.3V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING


    Original     		PDF 74LVQ00 LVQ00 74LVQ00 74LVQ00M 74LVQ00T TSSOP14

    74VHC27

    Abstract: 74VHC27M 74VHC27T TSSOP14
    Text: 74VHC27  TRIPLE 3-INPUT NOR GATE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.1 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS


    Original     		PDF 74VHC27 74VHC27 74VHC27M 74VHC27T TSSOP14

    HCF4541

    Abstract: HCF4541 timer HCF4541BEY HCF4541B HCC4541B
    Text: HCC4541B HCF4541B PROGRAMMABLE TIMER 16 STAGE BINARI COUNTER LOW SYMMETRICAL OUTPUT RESISTANCE, TYPICALLY 100 OHM AT VDD = 15V OSCILLATOR FREQUENCY RANGE : DC TO 100kHz AUTO OR MASTER RESET DISABLES OSCILLATOR DURING RESET TO REDUCE POWER DISSIPATION OPERATES WITH VERY SLOW CLOCK RISE


    Original     		PDF HCC4541B HCF4541B 100kHz HCF4541 HCF4541 timer HCF4541BEY HCF4541B HCC4541B

    VHC132

    Abstract: 74VHC132 VHC00 74VHC132M 74VHC132T TSSOP14
    Text: 74VHC132  QUAD 2-INPUT SCHMITT NAND GATE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.9 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC TYPICAL HYSTERESIS: Vh = 1V at VCC = 4.5V POWER DOWN PROTECTION ON INPUTS


    Original     		PDF 74VHC132 74VHC132 VHC132 VHC00 74VHC132M 74VHC132T TSSOP14

    74VHC14

    Abstract: 74VHC14M 74VHC14T TSSOP14 VHC04 VHC14
    Text: 74VHC14  HEX SCHMITT INVERTER PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.5 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC TYPICAL HYSTERESIS: Vh = 1V at VCC = 4.5V POWER DOWN PROTECTION ON INPUTS


    Original     		PDF 74VHC14 74VHC14 74VHC14M 74VHC14T TSSOP14 VHC04 VHC14

    74VHC125

    Abstract: 74VHC125M 74VHC125T TSSOP14
    Text: 74VHC125  QUAD BUS BUFFERS 3-STATE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS


    Original     		PDF 74VHC125 74VHC125 74VHC125M 74VHC125T TSSOP14

    74LVX04

    Abstract: 74LVX04M 74LVX04T TSSOP14
    Text: 74LVX04 LOW VOLTAGE CMOS HEX INVERTER • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.1 ns TYP. at VCC = 3.3V INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V


    Original     		PDF 74LVX04 74LVX04 74LVX04M 74LVX04T TSSOP14

    CI 4071B

    Abstract: 4072B 4075B 4071B cmos 4072B pin connections of 4075b
    Text: HCC4071B/72B/75B HCF4071B/72B/75B OR GATE 4071B - QUAD 2–INPUT OR GATE 4072B - QUAD 4–INPUT OR GATE 4075B - TRIPLE 3–INPUT OR GATE . . . . MEDIUM-SPEED OPERATION tPLH, tPHL = 60ns. typ. AT VDD = 10V QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE


    Original     		PDF HCC4071B/72B/75B HCF4071B/72B/75B 4071B 4072B 4075B 100nA HCC40XXBF HCF40XXBM1 HCF40XXBEY HCF40XXBC1 CI 4071B cmos 4072B pin connections of 4075b

    DT 7130 IC

    Abstract: LC 7130 pin diagram of ic 4066 74HC4066 74LVQ4066 74LVQ4066M 74LVQ4066T LVQ4066 4066 IC circuit diagram
    Text: 74LVQ4066 Q UAD BILATERAL SW ITCH P R E LIM IN A R Y DATA . . . HIGH SPEED: tpD = 0.4 ns TYP. at V cc = 3.3V COMPATIBLE WITH TTL LEVEL LOW POWER DISSIPATION: Ice = 1 mA (MAX.) at TA = 25 °C . LO W ”ON” RESISTANCE: R o n = 20i2 at Vcc = 3.3V, h/o < 1 mA


    OCR Scan     		PDF 74LVQ4066 LVQ4066 74LVQ4066M 74LVQ4066T P013G TSSOP14 DT 7130 IC LC 7130 pin diagram of ic 4066 74HC4066 74LVQ4066 74LVQ4066T 4066 IC circuit diagram

    74ACT00

    Abstract: No abstract text available
    Text: ^ = T S G S -T H O M S O N n lsi S IILICTIs! iD©S 74ACT00 QUAD 2-INPUT NAND GATE . HIGH SPEED: tPD = 5 ns (TYP.) a tV c c =5V . LOW POWER DISSIPATION: Ice = 4 |xA (MAX.) at TA = 25 °C . COMPATIBLE WITH TTL OUTPUTS V ih = 2V (MIN), Vil = 0.8V (MAX) . 50i2 TRANSMISSION LINE DRIVING


    OCR Scan     		PDF 74ACT00 ACT00 P013G 74ACT00