AC138
Abstract: AC138M CD54AC138 CD54AC138F3A CD74AC138 CD74AC138E CD74AC138M CD74AC138M96
Text: CD54AC138, CD74AC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCHS328A – JANUARY 2003 – REVISED FEBRUARY 2003 D D D D D D D D CD54AC138 . . . F PACKAGE CD74AC138 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the
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CD54AC138,
CD74AC138
SCHS328A
CD54AC138
24-mA
MIL-STD-883,
AC138
AC138M
CD54AC138
CD54AC138F3A
CD74AC138
CD74AC138E
CD74AC138M
CD74AC138M96
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msi 7267 MOTHERBOARD SERVICE MANUAL
Abstract: ttl cookbook msi ms 7267 MOTHERBOARD CIRCUIT diagram "0.4mm" bga "ball collapse" height PCF 799 crystal oscillator 8MHz 4 pins smd diode MARKING F5 44C smd TRANSISTOR code marking A7 terminals diagram of smd transistor bo2 cookbook for ic 555
Text: GTL/GTLP Logic High-Performance Backplane Drivers Data Book Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information
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Original
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GDFP1-F48
-146AA
GDFP1-F56
-146AB
msi 7267 MOTHERBOARD SERVICE MANUAL
ttl cookbook
msi ms 7267 MOTHERBOARD CIRCUIT diagram
"0.4mm" bga "ball collapse" height
PCF 799
crystal oscillator 8MHz 4 pins
smd diode MARKING F5 44C
smd TRANSISTOR code marking A7
terminals diagram of smd transistor bo2
cookbook for ic 555
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PDF
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TRS3238CDB
Abstract: TRS3238CDBR TRS3238CPW TRS3238CPWR
Text: www.ti.com TRS3238 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD HBM PROTECTION FEATURES • • • • • • • • • • RS-232 Bus-Pin ESD Protection Exceeds ±15 kV Using Human-Body Model (HBM) Meets or Exceeds the Requirements of
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TRS3238
RS-232
15-kV
TIA/EIA-232-F
TRSF3238
SLLS817
TRS3238CDB
TRS3238CDBR
TRS3238CPW
TRS3238CPWR
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PDF
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CD74ACT238
Abstract: CD74ACT238E MS-001
Text: CD74ACT238 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER SCHS330 –FEBRUARY 2003 D D D D D D D D E PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Designed Specifically for High-Speed
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CD74ACT238
SCHS330
24-mA
MIL-STD-883,
CD74ACT238
CD74ACT238E
MS-001
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AC138M
Abstract: AC138 CD54AC138 CD54AC138F3A CD74AC138 CD74AC138E CD74AC138M CD74AC138M96 CD74AC13
Text: CD54AC138, CD74AC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCHS328A – JANUARY 2003 – REVISED FEBRUARY 2003 D D D D D D D D CD54AC138 . . . F PACKAGE CD74AC138 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the
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Original
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CD54AC138,
CD74AC138
SCHS328A
CD54AC138
24-mA
MIL-STD-883,
AC138M
AC138
CD54AC138
CD54AC138F3A
CD74AC138
CD74AC138E
CD74AC138M
CD74AC138M96
CD74AC13
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PDF
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c.i 9409
Abstract: No abstract text available
Text: CDC339 CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS331 – DECEMBER 1992 – REVISED MARCH 1994 D D D D D D D DB OR DW PACKAGE TOP VIEW Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and Outputs Distributes One Clock Input to Eight
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CDC339
SCAS331
48-mA
CLC339DBLE
CDC339DBR
CDC339DW
CDC339DWR
c.i 9409
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54AHCT138, SN74AHCT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS266L – DECEMBER 1995 – REVISED SEPTEMBER 2002 15 3 14 4 13 5 12 6 11 7 10 8 9 B C G2A G2B G1 Y7 16 B A NC VCC Y0 1 SN54AHCT138 . . . FK PACKAGE TOP VIEW C G2A NC G2B G1 15 Y0 14 Y1
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SN54AHCT138,
SN74AHCT138
SCLS266L
000-V
A114-A)
A115-A)
SN54AHCT138
AHCT138
SN74AHCT138PWR
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Untitled
Abstract: No abstract text available
Text: SN74HC4851 8ĆCHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER WITH INJECTIONĆCURRENT EFFECT CONTROL SCLS542 − SEPTEMBER 2003 D Injection-Current Cross Coupling <1mV/mA D D D D D D, DGV, N, OR PW PACKAGE TOP VIEW (see Figure 1) Low Crosstalk Between Switches
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SN74HC4851
SCLS542
SN74HC4051,
SN74LV4051A,
CD4051B
000-V
A114-A)
A115-A)
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ACT138M
Abstract: No abstract text available
Text: CD54ACT138, CD74ACT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCHS329A – JANUARY 2003 – REVISED FEBRUARY 2003 D D D D D D D D CD54ACT138 . . . F PACKAGE CD74ACT138 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With
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Original
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CD54ACT138,
CD74ACT138
SCHS329A
24-mA
MIL-STD-883,
CD54ACT138
CD74ACT138
ACT138M
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Untitled
Abstract: No abstract text available
Text: SN55116, SN75116, SN75117, SN75118, SN75119 DIFFERENTIAL LINE TRANSCEIVERS SLLS073D – MAY 1976 – REVISED MAY 1998 features common to all types D D D D D D D additional features of the SN55116/SN75116 Single 5-V Supply 3-State Driver Output Circuitry TTL-Compatible Driver Inputs
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SN55116,
SN75116,
SN75117,
SN75118,
SN75119
SLLS073D
SN55116/SN75116
SN75117)
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PDF
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TLV2352
Abstract: TLV2352ID TLV2352IP TLV2352M TLV2352MFK TLV2352MJG TLV2352Y
Text: TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS011B – MAY 1992 – REVISED MARCH 1999 D D D D D D D Wide Range of Supply Voltages 2 V to 8 V Fully Characterized at 3 V and 5 V Very-Low Supply-Current Drain 120 µA Typ at 3 V Output Compatible With TTL, MOS, and
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TLV2352,
TLV2352Y
SLCS011B
TLV2352
TLV2352ID
TLV2352IP
TLV2352M
TLV2352MFK
TLV2352MJG
TLV2352Y
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PDF
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MP238
Abstract: No abstract text available
Text: www.ti.com MAX3238E 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD HBM PROTECTION SLLS710A – FEBRUARY 2006 – REVISED APRIL 2006 FEATURES • • • • • • • • • • • RS-232 Bus-Pin ESD Protection Exceeds ±15 kV Using Human-Body Model (HBM)
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MAX3238E
RS-232
15-kV
SLLS710A
TIA/EIA-232-F
SNx5C3238
MP238
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PDF
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ma3238c
Abstract: MA3238
Text: MAX3238 3ĆV TO 5.5ĆV MULTICHANNEL RSĆ232 LINE DRIVER/RECEIVER WITH ±15ĆkV ESD HBM PROTECTION ą SLLS349J − JUNE 1999 − REVISED MARCH 2004 D RS-232 Bus-Pin ESD Protection Exceeds D D D D D D D D D D DB OR PW PACKAGE (TOP VIEW) ±15 kV Using Human-Body Model (HBM)
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MAX3238
RS232
SLLS349J
RS-232
TIA/EIA-232-F
SNx5C3238
ma3238c
MA3238
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54AHC138, SN74AHC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS258L − DECEMBER 1995 − REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC D Designed Specifically for High-Speed D Memory Decoders and Data-Transmission Systems Incorporate Three Enable Inputs to Simplify
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Original
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SN54AHC138,
SN74AHC138
SCLS258L
000-V
A114-A)
A115-A)
SN54AHC138
AHC138
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Untitled
Abstract: No abstract text available
Text: SN54AHC138, SN74AHC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS S CLS258C - DECEM BER 1995 - REVISED JULY 1996 Operating Range 2-V to 5.5-V Vqc E P IC * Enhanced-Performance Implanted CMOS Process SN54AMC138 . . . J O R W PACKAGE SN74AHC138 . . . D, DB, N, OR PW PACKAGE
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OCR Scan
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SN54AHC138,
SN74AHC138
CLS258C
300-mll
SN54AMC138
SN74AHC138
SN54AHC138
AHC138
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PDF
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sfe 5,5 ma
Abstract: CD3024 PD3024
Text: >rJ , J Am 29C?33/834 CMOS Parity Bus Transceivers PRELIMINARY > > 3 3 DISTINCTIVE CHARACTERISTICS • • • Low-power CMOS - ICC Static = 80 //A High-speed bidirectional bus transceiver for processor organized devices Error flag with open-collector output
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OCR Scan
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200-mV
Am29C833/834
Am29C853/854
Am29C853/54
sfe 5,5 ma
CD3024
PD3024
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PDF
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Am2963
Abstract: No abstract text available
Text: Am29833A/Am29853A/Am29855A Parity Bus Transceivers VSS86ZUJV/V8S86ZUIV/VSC86ZUIV DISTINCTIVE CHARACTERISTICS • High-speed bidirectional bus transceivers for processor organized devices - T-R delay = 6 ns typical - Rj-Parity delay = 9 ns typical • Error flag with open-collector output
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OCR Scan
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Am29833A/Am29853A/Am29855A
VSS86ZUJV/V8S86ZUIV/VSC86ZUIV
200-mV
Am29833
Am29853
Am29855A
Am29833A
Am29853A
AIS-WCP-20M-01/88-0
Am2963
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PDF
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29c833
Abstract: 29C933 amd 955
Text: Am29C833/Am29C853/Am29C855 Am29C933/Am29C953/Am29C955 Am29C833/Am29C853/Am29C855 Am29C933/Am29C953/Am29C955 High-Performance CMOS Parity Bus Transceivers DISTINCTIVE CHARACTERISTICS • • • • High-speed CMOS bidirectional bustransceivers - T-R delay = 6 ns typical
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OCR Scan
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Am29C833/Am29C853/Am29C855
Am29C933/Am29C953/Am29C955
Am29C855
200-mV
Am29C900
Am29C833
Am29C853
29c833
29C933
amd 955
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PDF
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Untitled
Abstract: No abstract text available
Text: 'T i i: ! ' ,: y < * j 5=2 ' CJ • J Am29C833/834 <5^^V^3 ô ’H J fljt-IU ZJ O ÿ to ijL f CMOS Parity Bus Transceivers PRELIMINARY DISTINCTIVE CHARACTERISTICS Low-power CMOS - Ice Static = 80 (M High-speed bidirectional bus transceiver for processor
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OCR Scan
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Am29C833/834
200-mV
Am29C853/854
Am29C853/54
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PDF
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picoammeter circuit
Abstract: TLV2354 TLV2354ID TLV2354Y
Text: TLV2354I, TLV2354Y LinCMOS QUADRUPLE LOW-VOLTAGE DIFFERENTIAL COMPARATORS SLCS012 —MAY 1992 D OR N PACKAGE TOP VIEW W ide Range of Supply Voltages 2 V to 8 V Fully Characterized at 3 V and 5 V 10UT [ 1 20UT [ 2 Vdd Ì 3 2 IN -I 4 2 IN + [ 5 11N— [ 6
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OCR Scan
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TLV2354I,
TLV2354Y
SLCS012
105-mV
picoammeter circuit
TLV2354
TLV2354ID
TLV2354Y
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PDF
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AHC138
Abstract: SN54AHC138 SN74AHC138
Text: SN54AHC138, SN74AHC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS S C L S 2 5 8 C - D E C E M B E R 1 9 9 5 - R E V IS E D J U L Y 1 9 9 6 Operating Range 2-V to 5.5-V V^c EPIC Enhanced-Performance Implanted CMOS Process Designed Specifically for High-Speed
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OCR Scan
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SN54AHC138,
SN74AHC138
SCLS258C-
300-mil
SN54AHC138
SCLS258C
AHC138
SN54AHC138
SN74AHC138
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PDF
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12L10
Abstract: 16L6 20L10 20L8 PLD20G10C 12DC
Text: 4bE SEMICONDUCTOR SSÔTbtS D OGGbTMM PRELIMINARY CYPRESS SEMICONDUCTOR Features • Ultra high speed supports today’s and tomorrow’s fastest microprocessors — tpD = 7.5 ns — tsu = 3 ns — fM A X = 1 0 5 M tte • Reduced ground bounce and under
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OCR Scan
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PLD20G10C
24-Pin
10SMHZ
20L10,
12L10
PLD20G10C-
10KMB
10LMB
16L6
20L10
20L8
PLD20G10C 12DC
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PDF
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mb570
Abstract: Am26LS32 "pin-compatible" SLLS202A AM26C32 AM26LS32 AM26LV31 AM26LV32 AM26LV32C AM26LV32CNSLE TV RECEIVER 1995 IF
Text: AM26LV32C LOW VOLTAGE HIGH-SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER SLLS202A - MAY 1995 - REVISED S E P T E M B E R 1995 32-MHz Switching Rate D OR NST PACKAGE TOP VIEW Operates from a Single 3.3-V Supply Ultra-Low Power Dissipation . . . 27 mW Typ Open-Circuit Fall Safe
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OCR Scan
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AM26LV32C
SLLS202A
32-MHz
AM26C32,
AM26LS32,
MB570
AM26LV32CNSLE.
SLLS202A-
mb570
Am26LS32 "pin-compatible"
AM26C32
AM26LS32
AM26LV31
AM26LV32
AM26LV32CNSLE
TV RECEIVER 1995 IF
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PDF
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22V10D
Abstract: PALC22V10D-10PC PALC22V10B PALC22V10B-15 PALC22V10D PALC22V10D-10JC
Text: MbE D CYPRESS SEMICONDUCTOR • aSBTbbE QOGbcieJS 3 E3CYP PRELIMINARY CYPRESS SEMICONDUCTOR PALC22V10D Flash Erasable, Reprogrammable CMOS PAL Device Features Advanced second-generation PAL ar chitecture Low power — 90 mA max. standard — 120 mA max. military
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OCR Scan
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PALC22V10D
100-MHz
83-MHz
PALC22V10D
15DMB
PALC22V10D-
PALC22V10Dâ
15KMB
PALC22V10D-15LMB
22V10D
PALC22V10D-10PC
PALC22V10B
PALC22V10B-15
PALC22V10D-10JC
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PDF
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