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QuickLogic Corporation QL2009-1PB256 FIELD PROGRAMMABLE GATE ARRAY, 672 CLBS, 9000 GATES, 161MHZ, 672-CELL, CMOS, PBGA256
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Quest Components	QL2009-1PB256		7			1 $123.5 10 $118.75 100 $118.75 1000 $118.75 10000 $118.75	Buy Now

QL20091PB Datasheets (2)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
QL2009-1PB256C		QuickLogic	3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility		Original	PDF
QL2009-1PB256I		QuickLogic	3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility		Original	PDF

QL20091PB Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: QL2009  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	QL2009	PDF
PF144 Abstract: PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C Text: QL2009  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	QL2009 PF144 PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C	PDF
QL2009 Abstract: QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C TIL405 Text: Q L2009 9,000 Gate pASIC 2 FPGA Com bining Speed, Density, Low Cost and Flexibility PRELIMINARY DA TA pASIC 2 HIGHLIGHTS E Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	OCR Scan	QL2009 QL2009 PQ208 PF144 144-pin PQ208 208-pin PB256 256-pin 0000b77 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C TIL405	PDF
cadence xa 125 2 Abstract: PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C IOG20 Text: QL2009 9,000 Gate 3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility PRELIM INARY DATA pASIC 2 HIGHLIGHTS Rev. B 5 Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	OCR Scan	QL2009 QL2009 cadence xa 125 2 PQ208 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C IOG20	PDF
PCI i/o schematics Abstract: PF144 PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C Text: QL2009  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. D pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	QL2009 PCI i/o schematics PF144 PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C	PDF
77-I Abstract: PB256 PF144 PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C Text: Appendix J - QL2009 Pinout Diagrams Appendix J: QL2009 Pinout Diagrams QL2009 Packages Summary Total # Pins Package Type No Connect VCC and GND JTAG/ Prog Clock 144 208 256 TQFP PQFP PBGA 20 28 25 6 6 6 4 4 4 User Pins Input-Only Input/Output 4 4 4 110 166	Original	QL2009 PF144) QL2009-1PF144C QL2009) 77-I PB256 PF144 PQ208 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C	PDF
PF144 Abstract: PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C Text: QL2009 9,000 Gate pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility PRELIMINARY DATA pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	QL2009 PF144 PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C	PDF
456-PBGA Abstract: QL20091PB Text: QL2009  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	QL2009 -16-bit 144-TQFP QL24x32B 208-PQFP 208-CQFP 125oC MIL-STD-883 456-PBGA QL20091PB	PDF
QL2009-1PB256C Abstract: PB256 PF144 PQ208 QL2009 QL2009-1PF144C QL2009-1PQ208C Text: Appendix I - QL2009 Pinout Diagrams Appendix I: QL2009 Pinout Diagrams QL2009 Packages Summary Total # Pins Package Type No Connect VCC and GND JTAG/ Prog Clock 144 208 256 TQFP PQFP PBGA 20 28 25 6 6 6 4 4 4 User Pins Input-Only Input/Output 4 4 4 110 166	Original	QL2009 PF144) QL2009-1PF144C QL2009) QL2009-1PB256C PB256 PF144 PQ208 QL2009-1PF144C QL2009-1PQ208C	PDF