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    QUAD 2 INPUT STANDARD CMOS NAND GATE DATA SHEET Search Results

    QUAD 2 INPUT STANDARD CMOS NAND GATE DATA SHEET Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MHM411-21 Murata Manufacturing Co Ltd Ionizer Module, 100-120VAC-input, Negative Ion Visit Murata Manufacturing Co Ltd
    DE6B3KJ151KA4BE01J Murata Manufacturing Co Ltd Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd
    DE6B3KJ471KB4BE01J Murata Manufacturing Co Ltd Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd
    DE6E3KJ152MN4A Murata Manufacturing Co Ltd Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd
    DE6B3KJ101KA4BE01J Murata Manufacturing Co Ltd Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd

    QUAD 2 INPUT STANDARD CMOS NAND GATE DATA SHEET Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    PIN DIAGRAM 74hct132

    Abstract: 74HC132 74HCT132 74LV132 74LV132BQ 74LV132D 74LV132DB 74LV132N 74LV132PW JESD22-A114E
    Text: 74LV132 Quad 2-input NAND Schmitt trigger Rev. 05 — 2 July 2009 Product data sheet 1. General description The 74LV132 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC132 and 74HCT132. The 74LV132 contains four 2-input NAND gates which accept standard input signals.


    Original     		74LV132 74LV132 74HC132 74HCT132. PIN DIAGRAM 74hct132 74HCT132 74LV132BQ 74LV132D 74LV132DB 74LV132N 74LV132PW JESD22-A114E PDF

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC74HC03A Quad 2-Input NAND Gate With Open-Drain Outputs High-Performance Silicon-Gate CMOS The MC74HC03A is identical in pinout to the LS03. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they


    OCR Scan     		MC74HC03A MC74HC03A HC03A PDF

    74HC132

    Abstract: 74HCT132 74LV132 74LV132BQ 74LV132D 74LV132DB 74LV132N 74LV132PW JESD22-A114E
    Text: 74LV132 Quad 2-input NAND Schmitt trigger Rev. 04 — 12 November 2007 Product data sheet 1. General description The 74LV132 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC132 and 74HCT132. The 74LV132 contains four 2-input NAND gates which accept standard input signals.


    Original     		74LV132 74LV132 74HC132 74HCT132. 74HCT132 74LV132BQ 74LV132D 74LV132DB 74LV132N 74LV132PW JESD22-A114E PDF

    74HC132

    Abstract: 74HCT132 74LV132 74LV132D 74LV132DB 74LV132N 74LV132PW
    Text: 74LV132 Quad 2-input NAND Schmitt trigger Rev. 03 — 15 April 2004 Product data sheet 1. General description The 74LV132 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC132 and 74HCT132. The 74LV132 contains four 2-input NAND gates which accept standard input signals.


    Original     		74LV132 74LV132 74HC132 74HCT132. 74HCT132 74LV132D 74LV132DB 74LV132N 74LV132PW PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LV132-Q100 Quad 2-input NAND Schmitt trigger Rev. 1 — 11 November 2013 Product data sheet 1. General description The 74LV132-Q100 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC132-Q100 and 74HCT132-Q100. The 74LV132-Q100 contains four 2-input NAND gates which accept standard input


    Original     		74LV132-Q100 74LV132-Q100 74HC132-Q100 74HCT132-Q100. 74LV132 PDF

    DL129

    Abstract: LS03 MC74HC03A MC74HCXXAD MC74HCXXAN
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC74HC03A Quad 2-Input NAND Gate With Open-Drain Outputs High–Performance Silicon–Gate CMOS The MC74HC03A is identical in pinout to the LS03. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they


    Original     		MC74HC03A MC74HC03A HC03A DL129 MC74HC03A/D* MC74HC03A/D LS03 MC74HCXXAD MC74HCXXAN PDF

    Untitled

    Abstract: No abstract text available
    Text: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 6 — 14 December 2011 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .


    Original     		74HC00; 74HCT00 74HCT00 74HC00: 74HCT00: JESD22-A114F JESD22-A115-A PDF

    74hc00

    Abstract: TTL 74HC00 74HCT00 74HCT00N 74HC00DB 74HCT00D 74HCT00DB 74HC00 B1 74HC00N function table 74HC00 ordering information
    Text: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 04 — 11 January 2010 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .


    Original     		74HC00; 74HCT00 74HCT00 74HC00: 74HCT00: JESD22-A114F JESD22-A115-A 74hc00 TTL 74HC00 74HCT00N 74HC00DB 74HCT00D 74HCT00DB 74HC00 B1 74HC00N function table 74HC00 ordering information PDF

    74HC00 NOT GATE

    Abstract: 74HC00 74HCT00 TTL 74HC00 74HC00 national semiconductor 74HC00 B1 74HCT00N 74HC00DB 74HC00N 74HCT00D
    Text: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 5 — 25 November 2010 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .


    Original     		74HC00; 74HCT00 74HCT00 74HC00: 74HCT00: JESD22-A114F JESD22-A115-A 74HC00 NOT GATE 74HC00 TTL 74HC00 74HC00 national semiconductor 74HC00 B1 74HCT00N 74HC00DB 74HC00N 74HCT00D PDF

    74hc00n

    Abstract: 74hct00 CI 74hct00 74HC00DB 74HC00PW 74HC00 14 pin 74HC00 74HC00 B1 74HC00 ordering information 74HCT00DB
    Text: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 6 — 14 December 2011 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .


    Original     		74HC00; 74HCT00 74HCT00 74HC00: 74HCT00: JESD22-A114F JESD22-A115-A 74hc00n CI 74hct00 74HC00DB 74HC00PW 74HC00 14 pin 74HC00 74HC00 B1 74HC00 ordering information 74HCT00DB PDF

    TRANSISTOR 13-h

    Abstract: schematic diagram NAND gates S82H-3524 CD4011BT 5962R9662101TCC 5962R9662101TXC CD4011BDTR CD4011BKTR cmos ic nand gates quad 2 input AB312
    Text: CD4011BT Data Sheet July 1999 File Number CMOS Quad 2-Input NAND Gate Features Intersil’s Satellite Applications FlowTM SAF devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended


    Original     		CD4011BT 100kRAD MIL-PRF-38535 CD4011BT, TRANSISTOR 13-h schematic diagram NAND gates S82H-3524 CD4011BT 5962R9662101TCC 5962R9662101TXC CD4011BDTR CD4011BKTR cmos ic nand gates quad 2 input AB312 PDF

    74HCT00

    Abstract: 74HC00 74HC00 ordering information 74HCT00D CI 74HC00 74HC00 quad CMOS nand gate TTL 74HC00 74HC00 NOT GATE 74HC00BQ
    Text: 74HC00-Q100; 74HCT00-Q100 Quad 2-input NAND gate Rev. 1 — 12 July 2012 Product data sheet 1. General description The 74HC00-Q100; 74HCT00-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL


    Original     		74HC00-Q100; 74HCT00-Q100 74HCT00-Q100 AEC-Q100 74HC00-Q100: 74HCT00-Q100: protectio13 74HCT00 74HC00 74HC00 ordering information 74HCT00D CI 74HC00 74HC00 quad CMOS nand gate TTL 74HC00 74HC00 NOT GATE 74HC00BQ PDF

    IC 74HC00

    Abstract: No abstract text available
    Text: 74HC00-Q100; 74HCT00-Q100 Quad 2-input NAND gate Rev. 1 — 12 July 2012 Product data sheet 1. General description The 74HC00-Q100; 74HCT00-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL


    Original     		74HC00-Q100; 74HCT00-Q100 74HCT00-Q100 AEC-Q100 74HC00-Q100: IC 74HC00 PDF

    Untitled

    Abstract: No abstract text available
    Text: CD4011BT Semiconductor January 1999 Data Sheet File Number CMOS Quad 2-Input NAND Gate Features Harris’ Satellite Applications Flow SAF devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended


    OCR Scan     		CD4011BT 100kRAD MIL-PRF-38535 4011BT, 1-800-4-HARR PDF

    Untitled

    Abstract: No abstract text available
    Text: M O T O R O L A . SEM ICONDUCTOR TECHNICAL DATA MC54/74HC03A Quad 2-Input NAND Gate with Open-Drain Outputs High-Performance Silicon-Gate CMOS The M C 54/74HC03A is identical in pinout to the LS03. The device inputs are com patible with standard CMOS outputs; with pullup resistors, they are compatible


    OCR Scan     		54/74HC03A HC03A MC54/74HC03A PDF

    74HC132

    Abstract: 74HCT132
    Text: 74HC132; 74HCT132 Quad 2-input NAND Schmitt trigger Rev. 3 — 30 August 2012 Product data sheet 1. General description The 74HC132; 74HCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		74HC132; 74HCT132 74HCT132 HCT132 74HC132 PDF

    74AHC132

    Abstract: 74AHC132BQ 74AHC132D 74AHC132PW 74AHCT132 TSSOP14
    Text: 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger Rev. 05 — 9 May 2008 Product data sheet 1. General description The 74AHC132; 74AHCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		74AHC132; 74AHCT132 74AHCT132 AHCT132 74AHC132 74AHC132BQ 74AHC132D 74AHC132PW TSSOP14 PDF

    ahct132

    Abstract: 74AHC132 74AHC132BQ 74AHC132D 74AHC132PW 74AHCT132 TSSOP14
    Text: 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger Rev. 06 — 4 May 2009 Product data sheet 1. General description The 74AHC132; 74AHCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		74AHC132; 74AHCT132 74AHCT132 AHCT132 74AHC132 74AHC132BQ 74AHC132D 74AHC132PW TSSOP14 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger Rev. 06 — 4 May 2009 Product data sheet 1. General description The 74AHC132; 74AHCT132 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		74AHC132; 74AHCT132 74AHCT132 AHCT132 PDF

    selector guide 74HC 74HCT FAMILY

    Abstract: 74HC03D
    Text: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT03


    Original     		74HC/HCT/HCU/HCMOS 74HC/HCT03 01-Nov-97) selector guide 74HC 74HCT FAMILY 74HC03D PDF

    74HCT132D

    Abstract: 74HC132D PHILIPS 74HC132N 74HC132N 74HCT132PW
    Text: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT132


    Original     		74HC/HCT/HCU/HCMOS 74HC/HCT132 74HC/HCT132 74HC/HCT13ail /imaging/BITTING/CPL/20030424/04232003 HTML04232003/74HC132N Apr-29-2003 74HCT132D 74HC132D PHILIPS 74HC132N 74HC132N 74HCT132PW PDF

    74LVC00A

    Abstract: 74LVC00ABQ 74LVC00AD 74LVC00ADB 74LVC00APW SSOP14 TSSOP14
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC00A Quad 2-input NAND gate Product specification Supersedes data of 2003 May 07 2003 Sep 04 Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic


    Original     		74LVC00A 74LVC00A SCA75 R20/05/pp15 74LVC00ABQ 74LVC00AD 74LVC00ADB 74LVC00APW SSOP14 TSSOP14 PDF

    74HC/HCT/HCU/HCMOS Logic Family Specifications

    Abstract: hct00 74HC/HCT/HCU/HCMOS Logic Package Information 74HC/HCT/HCU/HCMOS Logic Package Outlines IC06 74HC/HCT/HCU/HCMOS Logic Package Information 74HC,HCT00 IC06 74HC/HCT/HCU/HCMOS Logic Package Outline IC06 74HC/HCT/HCU/HCMOS Logic Family Specification IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC
    Text: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT00


    Original     		74HC/HCT/HCU/HCMOS 74HC/HCT00 74HC/HCT00 74HCT 74HC/HCT/HCU/HCMOS Logic Family Specifications hct00 74HC/HCT/HCU/HCMOS Logic Package Information 74HC/HCT/HCU/HCMOS Logic Package Outlines IC06 74HC/HCT/HCU/HCMOS Logic Package Information 74HC,HCT00 IC06 74HC/HCT/HCU/HCMOS Logic Package Outline IC06 74HC/HCT/HCU/HCMOS Logic Family Specification IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC PDF

    TSMC 0.18 um MOSfet

    Abstract: M38510 10102BCA IDT7204L 5962-8768401MQA 0.18um LDMOS TSMC sl1053 TSMC 0.25Um LDMOS UT63M125BB SMD RTAX250S-CQ208 5962-04221
    Text: DSCC Supplemental Information Sheet for Electronic QML-38535 Specification Details: Date: 9/2/2008 Specification: MIL-PRF-38535 Title: Advanced Microcircuits Federal Supply Class FSC : 5962 Conventional: No Specification contains quality assurance program: Yes


    Original     		QML-38535 MIL-PRF-38535 MIL-STD-790 MIL-STD-690 -581DSCC QML-38535 TSMC 0.18 um MOSfet M38510 10102BCA IDT7204L 5962-8768401MQA 0.18um LDMOS TSMC sl1053 TSMC 0.25Um LDMOS UT63M125BB SMD RTAX250S-CQ208 5962-04221 PDF