DDR3 DIMM 240 pinout
Abstract: K4B1G0846B Design Guide for DDR3-1066 M393B5170EH1-CF8 DDR3 DIMM K4B1G0846B-HC M393B5170EH1 ddr3 RDIMM pinout DDR3 RDIMM samsung m393
Text: DDR3 SDRAM Registered DIMM DDR3 SDRAM Specification 240pin Registered DIMM based on 1Gb E-die 72-bit ECC 78FBGA with Lead-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE
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240pin
72-bit
78FBGA
DDR3 DIMM 240 pinout
K4B1G0846B
Design Guide for DDR3-1066
M393B5170EH1-CF8
DDR3 DIMM
K4B1G0846B-HC
M393B5170EH1
ddr3 RDIMM pinout
DDR3 RDIMM samsung
m393
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K4B2G0846C-HC
Abstract: DDR3 RDIMM samsung FBGA DDR3
Text: Rev. 1.01, Dec. 2010 M393B5773CH0 M393B5273CH0 M393B5270CH0 M393B1K70CH0 M393B1K73CH0 M393B2K70CM0 240pin Registered DIMM based on 2Gb C-die 78FBGA with Lead-Free & Halogen-Free RoHS compliant datasheet SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
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M393B5773CH0
M393B5273CH0
M393B5270CH0
M393B1K70CH0
M393B1K73CH0
M393B2K70CM0
240pin
78FBGA
K4B2G0846C-HC
DDR3 RDIMM samsung
FBGA DDR3
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Untitled
Abstract: No abstract text available
Text: Rev. 1.01, Dec. 2010 M393B5773CH0 M393B5273CH0 M393B5270CH0 M393B1K70CH0 M393B1K73CH0 M393B2K70CM0 240pin Registered DIMM based on 2Gb C-die 78FBGA with Lead-Free & Halogen-Free RoHS compliant datasheet SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
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M393B5773CH0
M393B5273CH0
M393B5270CH0
M393B1K70CH0
M393B1K73CH0
M393B2K70CM0
240pin
78FBGA
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PDF
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Untitled
Abstract: No abstract text available
Text: Rev. 1.01, Jan. 2010 M393B5773CH0 M393B5273CH0 M393B5270CH0 M393B1K70CH0 M393B1K73CH0 M393B2K70CM0 240pin Registered DIMM based on 2Gb C-die 1.35V 78FBGA with Lead-Free & Halogen-Free RoHS compliant datasheet SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
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M393B5773CH0
M393B5273CH0
M393B5270CH0
M393B1K70CH0
M393B1K73CH0
M393B2K70CM0
240pin
78FBGA
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PDF
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M393B5170
Abstract: M393B5170FH0 DDR3 DIMM 240 pinout M393B5670FH0 M393B2873FH0 DDR3 RDIMM SPD JEDEC DDR3L 78FBGA M393B5673FH0 SSTL-15
Text: Rev. 1.01, Jan. 2010 M393B2873FH0 M393B5673FH0 M393B5670FH0 M393B5173FH0 M393B5170FH0 240pin Registered DIMM based on 1Gb F-die 1.35V 78FBGA with Lead-Free & Halogen-Free RoHS compliant datasheet SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
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M393B2873FH0
M393B5673FH0
M393B5670FH0
M393B5173FH0
M393B5170FH0
240pin
78FBGA
K4B1G0846F-HY*
M393B5170
M393B5170FH0
DDR3 DIMM 240 pinout
M393B5670FH0
M393B2873FH0
DDR3 RDIMM SPD JEDEC
DDR3L
M393B5673FH0
SSTL-15
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Untitled
Abstract: No abstract text available
Text: i'jr VITELIC V53C100A FAMILY HIGH PERFORMANCE, LOW POWER 1M X 1 BIT FAST PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE V53C100A 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 35 ns 40 ns 45 ns Max. CAS Access Time, (tCAC)
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V53C100A
V53C100A
70/70L
80/80L
10/10L
V53C100AL
V53C100A-10
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V53C104
Abstract: No abstract text available
Text: M O S E L - V IT E L i e V53C104F HIGH PERFORMANCE, LOW POWER 256K X 4 B IT FA ST PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE V53C104F Max. RAS Access Time, tRAC PRELIMINARY 60/60L 70/70L 80/80L 60 ns 70 ns 80 ns Max. Column Address Access Time, (tCAA) 30 ns
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V53C104F
V53C104F
60/60L
70/70L
80/80L
V53C104FL
200nA
V53C104
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Untitled
Abstract: No abstract text available
Text: M O S E L V iT E U C V53C104N HIGH PERFORMANCE, 3.3 VOLT 256K X 4 B IT FA S T PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE V53C104N 60/60L 70/70L 80/80L Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns Max. Column Address Access Time, (tCAA) 35 ns 40 ns 45 ns
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V53C104N
60/60L
70/70L
80/80L
V53C104NL
b353311
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semikron SKFT 150
Abstract: No abstract text available
Text: 3bE D : SEMIKRON INC • a i 3 bb?l Q Q Q 2 3 5G S M S E K G -ras-^ Vdrm V rrm Tv| = 125 °C Itrms (maximum values for continuous operation) 350 A 350 A Itav (sin. 180; Tease = 76°C; 50 Hz) 150 A 150 A V US 800 15 20 SKFT 150/08 DS SKFT 150/08 DT SKFH 150/08 DS
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SKFT150
fll3bb71
semikron SKFT 150
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Untitled
Abstract: No abstract text available
Text: M O S E L V fT E L iC V53C 104N H IG H PER FO RM A N CE, 3 .3 VO LT 2 5 6 K X 4 B IT F A S T P A G E M O D E C M O S D Y N A M IC R A M H IG H P E R F O R M A N C E V 5 3 C 1 0 4 N Max. RAS Access Time, ' RAC Max. Column Address Access Tim e, tCAA 6 0 /6 0 L
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V53C104N-80
V53C104N
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M5M448000-6
Abstract: No abstract text available
Text: MITSUBISHI LSIs M5M44800CJ,TP-5,-6,-7, -5S,-6S,-7S FAST PAGE MODE 4194304-BIT 524288-WORD BY 8-BIT DYNAMIC RAM D E S C R IP TIO N PIN C O N F IG U R A T IO N (T O P VIEW ) This is a family ol 524288-word by 8-bit dynamic RAMs, fabricated with the high performance CMOS process, and is ideal for largecapacity memory system s where high speed, low power
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M5M44800CJ
4194304-BIT
524288-WORD
M5M448000-6
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Untitled
Abstract: No abstract text available
Text: MT4C1664/5 64K X 16 D R AM MICRON DRAM 64K x 16 DRAM FAST PAGE MODE • Industry standard xl6 pinouts, timing, functions and packages • High-performance, CMOS silicon-gate process • Single +5V±10% power supply • Low power, 3mW standby; 225mW active, typical
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MT4C1664/5
225mW
256-cycle
MT4C1664
MT4C1665
40-Pin
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Untitled
Abstract: No abstract text available
Text: MITSUBISHI LS Is DRAM MODULE M H 1 M 3 2 B Y J - 5 ,-6 ,-7 / M H 1 M 3 2 B N Y J - 5 ,-6 , - 7 FAST PAGE MODE 33554432-BIT (1048576-WQRD BY 32-BIT) DYNAMIC RAM DESCRIPTION The MH1M32BYJ/BNYJ is 1048576-word x 32-bit dynamic PIN CONFIGURATION (TOP VIEW) (Single side]
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33554432-BIT
1048576-WQRD
32-BIT)
MH1M32BYJ/BNYJ
1048576-word
32-bit
32BYJ/BNYJ-5
32BYJ/BNYJ-6
32BYJ/BNYJ-7
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Untitled
Abstract: No abstract text available
Text: M IC R O N MT8C36256 DRAM MODULE 256K X 36 DRAM FEATURES OPTIONS DRAM MODULE PIN ASSIGNMENT (Top View • Industry standard pin-out in a 72-pin single-in-line package • High performance CMOS silicon gate process. • Single 5V±10% power supply • All inputs, outputs and clocks are fully TTL and
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MT8C36256
72-pin
2000mW
100ns
120ns
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Untitled
Abstract: No abstract text available
Text: MICRON TECHNOLOGY INC b i l l 5 4e! 0QG1031 7 14E » . W^jjgg T-¿/6-Z3 -/ 7 256K X 36 DRAM DRAM MODULE FEATURES PIN ASSIGNMENT Top View • Industry standard pin-out in a 72-pin single-in-line package • High performance CMOS silicon gate process. • Single 5V±10% power supply
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0QG1031
72-pin
2000mW
100ns
120ns
T-46-23-17
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Untitled
Abstract: No abstract text available
Text: KM41C4000AL CMOS DRAM 4 M X 1 Bit C M O S Dynamic R AM with Fast Page M ode FEATURES GENERAL DESCRIPTION • Perform ance range: The Samsung K M 4 1 C 4 0 0 0 A L is a high speed CMOS 4 ,1 9 4 ,3 0 4 bit X 1 Dynam ic Random A cce ss Memory. Its design is optimized for high perform ance applications
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KM41C4000AL
18-LEAD
20-LEAD
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DM110
Abstract: No abstract text available
Text: MDM11000T/V/G/J-10/12/15 Issue 1.0 July 1989 MDM11000-T/V/G/J 1Mx 1 Monolithic c m o s d r a m ADVANCE PRODUCT INFORMATION 1,048,576 x 1 CMOS High Speed Dynamic RAM Features Pin Definition Package Type: T.'V'.'G'.'J' Row Access Times of 100/120/150 nS High density 300mil DIP Package
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MDM11000T/V/G/J-10/12/15
MDM11000-T/V/G/J
300mil
MDM11000T
MIL-883B
10OOT/V/G/J-10/12/15
DM110
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N MT42C8255
Abstract: micron DRAM
Text: M T42C8255 256K X 8 VR AM UIICRON VRAM 256K x 8 DRAM WITH 512 x 8 SAM • • • • • • • • • • • PIN ASSIGNMENT (Top View Industry-standard pinout, tim ing and functions High-perform ance, CM O S silicon-gate process Single +5V ±10% power supply
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T42C8255
512-cycle
300mW
40-Pin
MT42C8255
N MT42C8255
micron DRAM
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MCM514258AJ80
Abstract: MCM514258AZ80 MCM514258A MCM514258AJ10 MCM514258ap80 514258
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MCM514258A Advance Information 2 5 6 K x 4 C M O S Dynamic RAM The MCM514258A is a 1.0*» CMOS high-speed, dynamic random access memory. It is organized as 262,144 four-bit words and fabricated w ith CMOS silicon-gate process tech
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MCM514258A
MCM514258A
300-mil
100-mil
Numbers--MCM514258AP70
MCM514258AP80
MCM514258AP10
MCM514258AJ80
MCM514258AZ80
MCM514258AJ10
514258
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Untitled
Abstract: No abstract text available
Text: MITSUBISHI LSIs M5M41000BPJ,L,VP,RV-7,-8,-10 FÄST PAGE M 0DE7 1048576-BIT 1048S76-W 0RD BY 1-BIT DYNAMIC RAM DESCRIPTION This is a fa m ily o f 1048576-word by 1-bit dynamic RAMs, fabricated w ith the high performance CMOS process, and is ideal fo r large-capacity memory systems where high
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M5M41000BPJ
1048576-BIT
1048S76-W
1048576-word
76-WORD
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Untitled
Abstract: No abstract text available
Text: V'TS’.T'SWf LS's M5M44258BP,J,L-7-»,H0 STATIC COLUMN MODE 1 0 4 8 S 7 6 -B IT 2 6 2 1 4 4 -W O R D B Y 4-BIT DYNAM IC RAM D ESC R IP T IO N This is a fam ily of 262144-word by 4-bit dynam ic RAM s, fabricated with the high performance CM OS process, and
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M5M44258BP
262144-word
M5M44258BP,
1048S76-BIT
62144-W
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sem 2107
Abstract: RT/IC sem 2107
Text: MT42C8255 256K X 8 VRAM |U |IC=RO N VRAM 256K X 8 DRAM WITH 512 X 8 SAM • • • • • • • • • • • Industry-standard pinout, tim ing and functions High-perform ance, CM OS silicon-gate process Single +5V ±10% power supply Inputs and outputs are fully TTL compatible
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MT42C8255
512-cycle
300mW
40-Pin
40/44-Pin
MT42C6255
sem 2107
RT/IC sem 2107
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2107 DRAM
Abstract: No abstract text available
Text: ADVANCE MT4LC8M8E1/B6 8 MEG X 8 DRAM I^ IIC Z R O N 8 MEG X 8 DRAM 3.3V, FAST PAGE MODE FEATURES • Single +3.3V ±0.3V pow er supply • Industry-standard x8 pinout, timing, functions and packages • 13 row-addresses, 10 column-addresses El or 12 row-addresses, 11 column-addresses (B6)
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096-cycle
34-Pin
2107 DRAM
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MB8101
Abstract: MB81C1001-10 RBS 2106 equivalent RBS 2107
Text: February 1990 Edition 3.0 FUJITSU DATA SHEET MB81C1001-70/-80/-10/-12 CMOS 1,048,576 BIT NIBBLE MODE DYNAMIC RAM CMOS 1M x 1 Bit Nibble Mode DRAM The Fujitsu MB81C1001 is a CMOS, fully decoded dynamic RAM organized as 1,048,576 words x 1 bit. The MB81C1001 has been designed for mainframe
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MB81C1001-70/-80/-10/-12
MB81C1001
C26064S-1C
MB81C1001-70
MB81C1001-80
MB81C1001-10
MB81C1001-12
20-LEAD
MB8101
RBS 2106 equivalent
RBS 2107
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