SCAD002
Abstract: D3311 s3724
Text: SN74ALS6300 INPUT-SELECTABLE REFRESH TIMER D3311. DECEMBER 1989-REVISED JULY 1990 N PACKAGE Supports 16 Most Popular Microprocessor Speeds TOP VIEW C LK[ Supports Distributlve- and Hldden-Refresh Operations so[ 2 S1[ 3 S2 [ 4 S3 [ 5 Polarity Options Available for RFC,
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SN74ALS6300
D3311.
1989-REVISED
ALS6300
D3311,
1989-REVISEO
SCAD002.
7526S
SCAD002
D3311
s3724
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SCAD002
Abstract: BCT2164
Text: SN74BCT2163, SN74BCT2164, SN74BCT2166 16K x 5 CACHE ADDRESS COMPARATORS/TAG RAMs _ D3513, JUNE 1990 — REVISED A U G U S T 1990 • Fast Address to MATCH Delay . . .12-ns Max • ’BCT2163 has Totem-Pole Match Output
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SN74BCT2163,
SN74BCT2164,
SN74BCT2166
D3513,
12-ns
BCT2163
BCT2164
BCT2166
75-pF
SCAD002
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D3365
Abstract: SN74ACT2160
Text: SN74ACT2160 8K x 4 2-WAY CACHE ADDRESS COMPARATOR/DATA RAM D3365, JANUARY 1990-REVISED JUNE 1990 Address to Match Time . . . 1 7 n s Max FM PACKAGE TOP VIEW 2-Way Architecture Significantly Improves Hit Rate KT> CO C\J 1 - O < < < < < < O O y L J P C J L J L J a n
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SN74ACT2160
D3365,
1990-REVISED
SCAD002.
D3365
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SN74BCT2160
Abstract: No abstract text available
Text: SN74BCT2160 8K X 4 2-WAY CACHE ADD REÍSS COMPARATOR/DATA RAM D 3 5 1 2 , A U G U S T 1990 - R E V IS E D A U G U S T 1990 FM P A C K A G E Fast Address to Match Time . . . 12 ns Max CTOP V IE W in < < 2-Way Architecture Significantly Improves Hit Rate <
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SN74BCT2160
SCAD002.
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SN74ACT2160
Abstract: No abstract text available
Text: SN74ACT2160 8K X 4 2-WAY CACHE ADDRESS COMPARATOR/DATA RAM D3365, JA N U A R Y 1 990-R E V IS E D JUNE 1990 A d dress to M atch Tim e . . . 17 ns Max FM PACKAGE TOP VIEW 2-W ay A rch ite c tu re S ig nifican tly Im proves Hit Rate IO Useful for Bus W atching
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SN74ACT2160
D3365,
990-R
SCAD002.
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Untitled
Abstract: No abstract text available
Text: 1K x SN74ACT2151, SN74ACT2153 11 CACHE ADDRESS COMPARATORS _ D 3105, SEPTEM BER 19 8 7 -R E V iS E D MARCH 1990 Fast Address to Match Delay . . . 22 ns Max N PACKAGE TOP VIEW On-Chip Address/Data Comparator u R ESET [ 1 A4 [ A3 [ A2 [ A1 [ AO [ DO [
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SN74ACT2151,
SN74ACT2153
ACT2151)
ACT2153)
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SN74ACT2158
Abstract: SN74ACT2159 SCAD002
Text: SN74ACT2158, SN74ACT2159 8K x 9 CACHE ADDRESS COMPARATORS/DATA RAMs D3281, MAY 1 990-R E V IS E D JUNE 1990 Fast Address to MATCH Delay 22 ns Max FN PACKAGE TOP VIEW 8K x 10 Internal Static RAM ? On-Chip Address/Data Comparator UJ m rr co <M T- o Ic/D c o l a l o
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SN74ACT2158,
SN74ACT2159
D3281,
990-R
ACT2159)
ACT2158)
SCAD002.
SN74ACT2158
SCAD002
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SN74ACT2157
Abstract: SCAD002 MC68030
Text: SN74ACT2157 2K x 16 CACHE ADDRESS COMPARATOR/DATA RAM D3326. JA N U A R Y 1990-R E V IS E D JU N E 1990 Fast Address to Match Delay . . . 20 ns Max FN PACKAGE The ’ACT2157 cache address comparator con sistsofah ig h-spe ed 2K x18 static RAM array, parity generators, parity checkers, and 18-bit
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SN74ACT2157
D3326.
1990-R
ACT2157
SCAD002.
SCAD002
MC68030
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cq037
Abstract: SN74ACT2155
Text: SN74ACT2156 16K x 4 BURST CACHE ADDRE SS COMPARATOR/DATA RAM D3412, APRIL 1990-RÊVISED JUNE 1990 • Cache Data RAM with Parity and Internal Burst Counter • Dirty Bit Storage Capability for Use in Copy-Back Caches • Separate I/O Supports Copy-Back TOP VIEW
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SN74ACT2156
D3412,
1990-R
MC68030
ACT2156
SCAD002.
cq037
SN74ACT2155
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SN74ACT2157
Abstract: No abstract text available
Text: SN74ACT2157 2K x 16 CACHE ADDRESS COMPARATOR/DATA RAM _ Totem-Pole and Open-Drain Match Outputs • On-Chip Address/Data Comparator • On-Chip Parity Generation and Checking • Direct 68030 Interface • Reliable Advanced CMOS Technology
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SN74ACT2157
D3326.
990-R
ACT2157
18-bo
SCAD002.
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SCAD002
Abstract: No abstract text available
Text: SN74ACT2140A 2-WAY 4K x 18/8K x 18 CACHE DATA RAM D3291, NO VEM BER 1 989-R E V IS E D JUNE 1990 FN PACKAGE Interfaces Directly with the Intel 82385 Cache Controller TOP VIEW 2 Access T im e . . . 25 ns Max CM CO Tf LO <0 O O LU J N CO o 0 ) t- T- r- < AO
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SN74ACT2140A
18/8K
D3291,
989-R
33-MHz
D8-D15,
A0-A11
SCAD002
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Untitled
Abstract: No abstract text available
Text: SN74ACT2140A 2-WAY 4K x 18/8K x 18 CACHE DATA RAM D3291, NOVEMBER 1989-REVISED JUNE 1990 • Interfaces Directly with the Intel 82385 Cache Controller • Access Time . . . 25 ns Max FN PA C K A G E TOP V IE W z • • • I Fast Access Time Supports 33-MHz Intel
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SN74ACT2140A
18/8K
D3291,
1989-REVISED
33-MHz
D8-D15,
A0-A11
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SCAD002
Abstract: SN74ACT2150A D416D
Text: 521 x SN74ACT2150A 8 CACHE ADDRESS COMPARATOR D3183, NO VEM BER 19B8— REVISED MARCH 1990 DW, JD, OR NT PACKAGE TOP VIEW Address to MATCH Valid Time - ACT2150A 20 ns MAX - ’ACT2150A 30 ns MAX RESET[ 1 300-Mil 24-Pin Ceramic Side-Brazed or Plastic Dual-ln-Line or Small Outline
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SN74ACT2150A
D3183,
19B8--
ACT2150A
300-Mil
24-Pin
SCAD002.
SCAD002
D416D
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edac c10
Abstract: D50 N16 G15-G16 SCAD002
Text: SN74AS6364 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION CIRCUIT D3312, FEBRUARY 1990-REVISED SEPTEMBER 1990 17 X 17 GA PACKAGE TOP VIEW 12-ns Max Pass-Thru Operation When Used in Correct-Oniy-On-Error Configurations Detects and Corrects Single-Bit Errors
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SN74AS6364
64-BIT
D3312,
1990-REVISED
12-ns
48-mA
SCAD002.
edac c10
D50 N16
G15-G16
SCAD002
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