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    SN74LV74DR Price and Stock

    Texas Instruments SN74LV74DR

    D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, PDSO14 '
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    Rochester Electronics SN74LV74DR 1,779 1
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    Velocity Electronics SN74LV74DR 1,675
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    SN74LV74DR Datasheets (2)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SN74LV74DR Texas Instruments DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP Original PDF
    SN74LV74DR Texas Instruments Dual Positive-Edge-Triggered D-Type Flip-Flop 14-SOIC -40 to 85 Original PDF

    SN74LV74DR Datasheets Context Search

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    Untitled

    Abstract: No abstract text available
    Text: SN54LV74, SN74LV74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS SCLS189C – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC  Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV74, SN74LV74 SCLS189C MIL-STD-883C, JESD-17 300-mil SN54LV74 SN74LV74 SCBA004C SDYA010

    Untitled

    Abstract: No abstract text available
    Text: SN54LV74, SN74LV74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS SCLS189C – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC  Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV74, SN74LV74 SCLS189C MIL-STD-883C, JESD-17 300-mil SN54LV74 SN74LV74 SDYA010 SDYA012

    SN54LV74

    Abstract: SN74LV74 SN74LV74D SN74LV74DBLE SN74LV74DR SN74LV74PWLE SN74LV74PWR
    Text: SN54LV74, SN74LV74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS SCLS189C − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC  Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV74, SN74LV74 SCLS189C MIL-STD-883C, JESD-17 300-mil SN54LV74 SN74LV74 SN74LV74D SN74LV74DBLE SN74LV74DR SN74LV74PWLE SN74LV74PWR

    Untitled

    Abstract: No abstract text available
    Text: SN54LV74, SN74LV74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS SCLS189C – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC  Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV74, SN74LV74 SCLS189C MIL-STD-883C, JESD-17 300-mil SN54LV74 SN74LV74

    Untitled

    Abstract: No abstract text available
    Text: SN54LV74, SN74LV74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS SCLS189C − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC  Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV74, SN74LV74 SCLS189C MIL-STD-883C, JESD-17 300-mil

    Untitled

    Abstract: No abstract text available
    Text: SN54LV74, SN74LV74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS SCLS189C − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC  Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV74, SN74LV74 SCLS189C MIL-STD-883C, JESD-17 300-mil SN54LV74 SN74LV74