SPEAR13 Search Results

SPEAR13 Price and Stock

Filter by Manufacturer


STMicroelectronics SPEAR1380-3 DUAL-CORE CORTEX A9 EMBEDDED MPU - Bulk (Alt: SPEAR1380-3)
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Avnet Americas	SPEAR1380-3	Bulk	360		1	1 - 10 - 100 - 1000 - 10000 -	Get Quote
STMicroelectronics SPEAR1310-SI MPU SPEAR1310 RISC 64-Bit 600MHz PBGA (Alt: SPEAR1310-SI)
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Avnet Silica	SPEAR1310-SI			13 Weeks	360	1 - 10 - 100 - 1000 - 10000 -	Buy Now

SPEAR13 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: SPEAr1310 Dual-core Cortex A9 embedded MPU for communications Data brief Features • CPU subsystem: – 2x ARM Cortex A9 cores, up to 600 MHz – Supporting both symmetric SMP and asymmetric (AMP) multiprocessing – 32+32 KB L1 Instructions/Data cache per	Original	SPEAr1310 64-bit DDR2-800/DDR3-1066 16/32y	PDF
Untitled Abstract: No abstract text available Text: SPEAr1310 Dual-core Cortex A9 embedded MPU for communications Data brief Features • CPU subsystem: – 2x ARM Cortex A9 cores, up to 600 MHz – Supporting both symmetric SMP and asymmetric (AMP) multiprocessing – 32+32 KB L1 Instructions/Data cache per	Original	SPEAr1310 64-bit DDR2-800/DDR3-1066 16/32y	PDF
Untitled Abstract: No abstract text available Text: SPEAr1340 Dual-core Cortex A9 HMI embedded MPU Datasheet − preliminary data Features • CPU subsystem: – 2x ARM Cortex A9 cores, up to 600 MHz – 32+32 KB L1 caches per core, with parity check – Shared 512 KB L2 cache – Accelerator coherence port ACP	Original	SPEAr1340 DDR3-1066, DDR2-1066 533MHz) 16-/32-bit,	PDF
cortex a9 specification Abstract: Cortex A9 instruction set Dual-core ARM Cortex-A9 CPU spear1310 led matrix 16X32 china cortex a9 arm cortex a9 ARM v7 cortex a9 block diagram led matrix 16X32 axi compliant ddr3 controller Text: SPEAr1310 Dual-core Cortex A9 embedded MPU for communications Data brief Features • CPU subsystem: – 2x ARM Cortex A9 cores, up to 600 MHz – Supporting both symmetric SMP and asymmetric (AMP) multiprocessing – 32+32 KB L1 Instructions/Data cache per	Original	SPEAr1310 64-bit DDR2-800/DDR3-1066 cortex a9 specification Cortex A9 instruction set Dual-core ARM Cortex-A9 CPU spear1310 led matrix 16X32 china cortex a9 arm cortex a9 ARM v7 cortex a9 block diagram led matrix 16X32 axi compliant ddr3 controller	PDF
Untitled Abstract: No abstract text available Text: EVALSP1340CPU EVALSP1340 evaluation board rev. 2.2 for SPEAr1340 Data brief − preliminary data Features • SPEAr1340 embedded MPU ■ 4 DDR3 chips (32-bit) 1 GB ■ Serial NOR Flash, 8 MB ■ 8-bit NAND Flash, 2 Gb ■ 16-bit NAND Flash expansion connector	Original	EVALSP1340CPU EVALSP1340 SPEAr1340 SPEAr1340 32-bit) 16-bit	PDF
H.264 encoder cortex a8 Abstract: arm cortex a9 cortex-a9 CMOS Sensor 1080p H.264 60 android mobile MOTHERBOARD CIRCUIT diagram 667 transistor ecb CHINA TV uoc ARm cortexA9 GPIO android mobile circuit diagram "ARM Cortex A9" Text: SPEAr1340 Dual-core Cortex A9 HMI embedded MPU Datasheet − preliminary data Features • CPU subsystem: – 2x ARM Cortex A9 cores, up to 600 MHz – 32+32 KB L1 caches per core, with parity check – Shared 512 KB L2 cache – Accelerator coherence port ACP	Original	SPEAr1340 DDR3-1066, DDR2-1066 533MHz) 16-/32-bit, H.264 encoder cortex a8 arm cortex a9 cortex-a9 CMOS Sensor 1080p H.264 60 android mobile MOTHERBOARD CIRCUIT diagram 667 transistor ecb CHINA TV uoc ARm cortexA9 GPIO android mobile circuit diagram "ARM Cortex A9"	PDF
arm cortex a9 Abstract: H.264 encoder cortex a8 "ARM Cortex A9" cmos digital camera module MMC 4.2 "NOR Flash controller" H.264 codec PD46 Dual-core ARM Cortex-A9 CPU cortex-a9 Text: SPEAr1340 Dual-core Cortex A9 HMI embedded MPU Datasheet − production data Features • CPU subsystem: – 2x ARM Cortex A9 cores, up to 600 MHz – 32+32 KB L1 caches per core, with parity check – Shared 512 KB L2 cache – Accelerator coherence port ACP	Original	SPEAr1340 DDR3-1066, DDR2-1066 533MHz) 16-/32-bit, arm cortex a9 H.264 encoder cortex a8 "ARM Cortex A9" cmos digital camera module MMC 4.2 "NOR Flash controller" H.264 codec PD46 Dual-core ARM Cortex-A9 CPU cortex-a9	PDF
arm cortex a9 Abstract: RMII PHY H.264 codec rgb led 16X32 encoder h.264 CMOS Sensor 1080p H.264 60 Tablets DIAGRAM SPEAR13 how to flash an android media "ARM Cortex A9" Text: SPEAr1340 Dual-core Cortex A9 HMI embedded MPU Datasheet − preliminary data Features • CPU subsystem: – 2x ARM Cortex A9 cores, up to 600 MHz – 32+32 KB L1 caches per core, with parity check – Shared 512 KB L2 cache – Accelerator coherence port ACP	Original	SPEAr1340 DDR3-1066, DDR2-800) 16-/32-bit, arm cortex a9 RMII PHY H.264 codec rgb led 16X32 encoder h.264 CMOS Sensor 1080p H.264 60 Tablets DIAGRAM SPEAR13 how to flash an android media "ARM Cortex A9"	PDF