P-TSOPII-54
Abstract: caz smd PC133 registered reference design
Text: HYB 39S64400/800/160ET L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM Preliminary Datasheet • Automatic and Controlled Precharge Command • High Performance: -7 -7.5 -8 Units fCKMAX 143 133 125 MHz tCK3 7 7.5 8 ns tAC3 5.4 5.4 6 ns tCK2 7.5 10 10
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Original
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39S64400/800/160ET
64-MBit
P-TSOPII-54
caz smd
PC133 registered reference design
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PDF
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SMD MARKING T20
Abstract: smd marking T22 MARKING A3 SMD MARKING CODE a09
Text: HYB 39S64400/800CT L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM • High Performance: • Full page (optional) for sequential wrap around • Multiple Burst Read with Single Write Operation -7.5 -8 Units fCKMAX 133 125 MHz tCK3 7.5 8 ns • Automatic and Controlled Precharge
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Original
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39S64400/800CT
64-MBit
SPT03933
SMD MARKING T20
smd marking T22
MARKING A3
SMD MARKING CODE a09
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PDF
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P-TSOPII-54
Abstract: PC133 registered reference design
Text: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • High Performance: • Multiple Burst Read with Single Write Operation -7 -7.5 -8 Units fCK 143 133 125 MHz • Automatic and Controlled Precharge Command tCK3 7 7.5 8 ns • Data Mask for Read/Write Control (x4, x8)
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Original
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39S128400/800/160CT
128-MBit
P-TSOPII-54
PC133 registered reference design
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PDF
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marking code EY SMD
Abstract: PC100-222-620 P-TSOPII-54
Text: HYB39L256160AC/T 256MBit 3.3V Mobile-RAM 256 MBit Synchronous Low-Power DRAM Data Sheet Revision Dec. 2002 • Automatic and Controlled Precharge Command Features -7.5 -8 Units fCK,MAX 133 125 MHz • Programmable Burst Length: 1, 2, 4, 8 and full page tCK3,MIN
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Original
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HYB39L256160AC/T
256MBit
16Mbit
P-TFBGA-54,
PC133
SPT03919-3
marking code EY SMD
PC100-222-620
P-TSOPII-54
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PDF
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HYB25L256160AC
Abstract: HYB25L256160AF HYE25L256160AF
Text: Data Sheet, Rev. 1.3, Nov 2004 HYB25L256160A[F/C] HYE25L256160AF 256MBit Mobile-RAM Mobile-RAM Commercial Temperature Range Extended Temperature Range Memory Products N e v e r s t o p t h i n k i n g . The information in this document is subject to change without notice.
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Original
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HYB25L256160A
HYE25L256160AF
256MBit
25L256160A
P-TFBGA-54
HYB25L256160AC
HYB25L256160AF
HYE25L256160AF
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PDF
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25L128
Abstract: PC133-333-522 PC100-222-620 25L128160 15p15
Text: HYB/E 25L128160AC 128-MBit Mobile-RAM 128-MBit Synchronous Low-Power DRAM in Chipsize Packages Datasheet Rev. 2003-02 • Automatic and Controlled Precharge Command High Performance: -7.5 -8 Units fCK,MAX 133 125 MHz tCK3,MIN 7.5 8 ns tAC3,MAX 5.4 6 ns tCK2,MIN
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Original
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25L128160AC
128-MBit
25L128
PC133-333-522
PC100-222-620
25L128160
15p15
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PDF
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smd marking T22
Abstract: smd transistor marking ba 128M-BIT P-TSOPII-54 P-TSOP-54 PC133 registered reference design 128-MBIT
Text: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • Multiple Burst Read with Single Write Operation • High Performance: -7 -7.5 -8 Units • Automatic and Controlled Precharge Command fCK 143 133 125 MHz • Data Mask for Read/Write Control (x4, x8)
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Original
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39S128400/800/160CT
128-MBit
smd marking T22
smd transistor marking ba
128M-BIT
P-TSOPII-54
P-TSOP-54
PC133 registered reference design
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PDF
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25L256
Abstract: No abstract text available
Text: Data Sheet, Rev. 1.40, Aug. 2005 HY[B/E]25L256160AC HY[B/E]25L256160AF 256MBit Mobile-RAM Commercial Temperature Range Extended Temperature Range Memory Products N e v e r s t o p t h i n k i n g . Edition 2005-08 Published by Infineon Technologies AG, St.-Martin-Strasse 53,
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25L256160AC
25L256160AF
256MBit
25L256160A
P-TFBGA-54
25L256
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PDF
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PC100-322-620
Abstract: PC-100-322-620 PC133-333-520 PC100-222-620 P-TSOPII-54 39S256400AT-8A SMD MARKING CODE t15
Text: HYB 39S256400/800/160AT 256-MBit Synchronous DRAM 256-MBit Synchronous DRAM Preliminary Datasheet • Multiple Burst Read with Single Write Operation • High Performance: • Automatic and Controlled Precharge Command -7.5 -8 -8A -8B Units fCK 133 125 125
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Original
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39S256400/800/160AT
256-MBit
SPT03933
PC100-322-620
PC-100-322-620
PC133-333-520
PC100-222-620
P-TSOPII-54
39S256400AT-8A
SMD MARKING CODE t15
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PDF
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T10-T12
Abstract: T11-T12 SPT03927
Text: HYB 39S64400/800/160AT L 64 MBit Synchronous DRAM Timing Diagrams 1 Bank Activate Command Cycle 2 Burst Read Operation 3 Read Interrupted by a Read 4 4.1 4.2 4.3 Read to Write Interval Read to Write Interval Minimum Read to Write Interval Non-Minimum Read to Write Interval
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Original
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39S64400/800/160AT
SPT03933
T10-T12
T11-T12
SPT03927
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PDF
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HYB25L256160AF
Abstract: HYE25L256160AF hye25l256160
Text: Data Sheet, Rev. 1.2, April 2004 HYB25L256160AF HYE25L256160AF 256MBit Mobi le- RAM Mobile-RAM Commercial Temperature Range E x t en d e d T e m p e r a t u r e R a n g e M e m or y P r o du c t s N e v e r s t o p t h i n k i n g . The information in this document is subject to change without notice.
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Original
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HYB25L256160AF
HYE25L256160AF
256MBit
25L256160AF
P-TFBGA-54
HYB25L256160AF
HYE25L256160AF
hye25l256160
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PDF
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cbx smd code
Abstract: SMD marking code ax2 PC100-222 PC133-333 P-TSOPII-54 smd marking T22
Text: HYB 39S64400/800CT L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM • High Performance: • Full page (optional) for sequential wrap around • Multiple Burst Read with Single Write Operation -7.5 -8 Units fCKMAX 133 125 MHz tCK3 7.5 8 ns • Automatic and Controlled Precharge
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Original
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39S64400/800CT
64-MBit
BanT14
SPT03933
HYB39S64400/800/160CT
64MBit
cbx smd code
SMD marking code ax2
PC100-222
PC133-333
P-TSOPII-54
smd marking T22
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PDF
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ISO 2768-mk
Abstract: PC100-222-620 HYB 39L128160AC-7.5
Text: HYB 39L128160AC/T 128-MBit 3.3V Mobile-RAM 128-MBit Synchronous Low-Power DRAM Datasheet Rev. 12/01 • Automatic and Controlled Precharge Command High Performance: -7.5 -8 Units fCK,MAX 133 125 MHz • Programmable Burst Length: 1, 2, 4, 8 and full page
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Original
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39L128160AC/T
128-MBit
54-FBGA
SPT03933
ISO 2768-mk
PC100-222-620
HYB 39L128160AC-7.5
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PDF
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HYB25L256160AC
Abstract: DSA0016243
Text: Data Sheet, V1.1, April 2003 HYB25L256160AC 256-Mbit Mobile-RAM 2.5V V D D Memory Products N e v e r s t o p t h i n k i n g . HYB25L256160AC Revision History: 2003-04-16 V1.1 Previous Version: 2001-11-23 V1.0 Page Subjects major changes since last version
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Original
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HYB25L256160AC
256-Mbit
P-TFBGA-54
HYB25L256160AC
DSA0016243
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PDF
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HYB 25L128160AC
Abstract: PC100-222-620 25L128160
Text: HYB/E 25L128160AC 128-MBit Mobile-RAM 128-MBit Synchronous Low-Power DRAM in Chipsize Packages Datasheet Rev. 12/01 • Automatic and Controlled Precharge Command High Performance: -7.5 -8 Units fCK,MAX 133 125 MHz tCK3,MIN 7.5 8 ns tAC3,MAX 5.4 6 ns tCK2,MIN
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Original
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25L128160AC
128-MBit
HYB 25L128160AC
PC100-222-620
25L128160
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PDF
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Untitled
Abstract: No abstract text available
Text: HYB 39L256160AC 256-MBit 3.3V Mobile-RAM 256-MBit Synchronous Low-Power DRAM in Chipsize Packages Target Datasheet Rev. 09/01 • Automatic and Controlled Precharge Command High Performance: -7.5 -8 Units fCK,MAX 133 125 MHz • Programmable Burst Length: 1, 2, 4, 8 and
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Original
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39L256160AC
256-MBit
105Mhz
54-FBGA
16Mbit
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PDF
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Untitled
Abstract: No abstract text available
Text: HYB/E 25L256160AC 256-MBit Mobile-RAM 256-MBit Synchronous Low-Power DRAM in Chipsize Packages Target Datasheet Rev. 09.2/01 • Deep Power Down Mode High Performance: -7.5 -8 Units fCK,MAX 133 125 MHz tCK3,MIN 7.5 8 ns tAC3,MAX 5.4 6 ns tCK2,MIN 9.5 9.5
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Original
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25L256160AC
256-MBit
105Mhz
16Mbit
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PDF
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Untitled
Abstract: No abstract text available
Text: HYB 39L128160AC 128-MBit 3.3V Mobile-RAM 128-MBit Synchronous Low-Power DRAM in Chipsize Packages Preliminary Datasheet Rev. 09.2/01 • Automatic and Controlled Precharge Command High Performance: -7.5 -8 Units fCK,MAX 133 125 MHz • Programmable Burst Length: 1, 2, 4, 8 and
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Original
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39L128160AC
128-MBit
105Mhz
54-FBGA
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PDF
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PC100-322-620
Abstract: 39S256 PC133 registered reference design HYB 39S256400CT-7.5 PC-100-322-620
Text: HYB39S256400/800/160CT L 256MBit Synchronous DRAM 256 MBit Synchronous DRAM • High Performance: -7.5 -8 -8A Units fCK 133 125 125 MHz tCK3 7.5 8 8 ns tAC3 5.4 6 6 ns tCK2 10 10 12 ns tAC2 6 6 6 ns • Fully Synchronous to Positive Clock Edge • 0 to 70 °C operating temperature
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Original
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HYB39S256400/800/160CT
256MBit
P-TSOPII-54
400mil
PC133
PC100
SPT03933
PC100-322-620
39S256
PC133 registered reference design
HYB 39S256400CT-7.5
PC-100-322-620
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PDF
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PC133 registered reference design
Abstract: No abstract text available
Text: HYB39S256400/800/160DT L 256MBit Synchronous DRAM 256 MBit Synchronous DRAM Preliminary Datasheet (Rev. 7/01) • High Performance: -6 -7 -7.5 -8 Units fCK 166 143 133 125 MHz tCK3 6 7 7.5 8 ns tAC3 5 5.4 5.4 6 ns tCK2 7.5 7.5 10 10 ns tAC2 5.4 5.4 6 6 ns
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Original
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HYB39S256400/800/160DT
256MBit
P-TSOPII-54
400mil
PC166
PC133
PC133 registered reference design
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PDF
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P-TSOPII-54
Abstract: Q67100-Q1838 Q67100-Q2781
Text: HYB 39S64400/800/160BT L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM • Multiple Burst Read with Single Write Operation • High Performance: • Automatic and Controlled Precharge Command -7.5 -8 Units fCKMAX 133 125 MHz tCK3 7.5 8 ns tAC3 5.4 6 ns
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Original
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39S64400/800/160BT
64-MBit
SPT03933
P-TSOPII-54
Q67100-Q1838
Q67100-Q2781
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PDF
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P-TSOPII-54
Abstract: No abstract text available
Text: HYB 39S128400/800/160DT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM Preliminary Target Specification 10.01 High Performance: • Multiple Burst Read with Single Write Operation -6 -7 -7.5 -8 Units fCK 166 143 133 125 MHz • Automatic and Controlled Precharge
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Original
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39S128400/800/160DT
128-MBit
HYB39S128400/800/160DT
P-TSOPII-54
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PDF
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tube az1
Abstract: smd CAY smd marking T22 smd transistor at t21 PC100-322-620 MARKING AX5 by1 SMD marking RBY transistor smd marking mx transistor SMD t15
Text: HYB 39S256400/800/160T 256-MBit Synchronous DRAM 256-MBit Synchronous DRAM • Multiple Burst Read with Single Write Operation • High Performance: • Automatic and Controlled Precharge Command -7.5 -8 -8A -8B Units fCK 133 125 125 100 MHz tCK3 7.5 8 8 10
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Original
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39S256400/800/160T
256-MBit
SPT03933
tube az1
smd CAY
smd marking T22
smd transistor at t21
PC100-322-620
MARKING AX5
by1 SMD
marking RBY
transistor smd marking mx
transistor SMD t15
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PDF
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PC100-222-620
Abstract: PC133-333-520 P-TSOPII-54 pc100-322-620 SMD MARKING CODE M3
Text: HYB 39S256400/800/160AT 256-MBit Synchronous DRAM 256-MBit Synchronous DRAM • Multiple Burst Read with Single Write Operation • High Performance: • Automatic and Controlled Precharge Command -7.5 -8 -8A -8B Units fCK 133 125 125 100 MHz tCK3 7.5 8 8
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Original
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39S256400/800/160AT
256-MBit
SPT03933
PC100-222-620
PC133-333-520
P-TSOPII-54
pc100-322-620
SMD MARKING CODE M3
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PDF
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