SR71010A

Abstract: L2 cache L3 cache MIPS64 ieee intelligent image processing line-locked SR7101 SR71010 MIPS64 instruction set
Contextual Info: SR71010A TM MIPS64 SUPERSCALAR MICROPROCESSOR ENGINES FOR THE DIGITAL AGE TM TM The SR71010A is a true 2-way superscalar MIPS64 PC gen iTLB BHT buffer i-cache decode BRU register file FP reg file dispatch dispatch ALUx ALUy LD/ST MOV LOAD SysAD & L3 Interface