STDH150 Search Results

STDH150 Datasheets (15)

Part	ECAD Model	Manufacturer	Description	Curated	Type	PDF
STDH150 ASIC		Samsung Electronics	STDH150 Brochure		Original	PDF
STDH150 ASIC		Samsung Electronics	Introduction		Original	PDF
STDH150 ASIC		Samsung Electronics	Book end		Original	PDF
STDH150 ASIC		Samsung Electronics	I-O IP Cells		Original	PDF
STDH150 ASIC		Samsung Electronics	Maximum Fanouts		Original	PDF
STDH150 ASIC		Samsung Electronics	High Density Memories		Original	PDF
STDH150 ASIC		Samsung Electronics	Package Capabilities		Original	PDF
STDH150 ASIC		Samsung Electronics	Primitive Latches		Original	PDF
STDH150 ASIC		Samsung Electronics	Primitive Overview		Original	PDF
STDH150 ASIC		Samsung Electronics	Primitive Logic Cells		Original	PDF
STDH150 ASIC		Samsung Electronics	Primitive Flip-Flops		Original	PDF
STDH150 ASIC		Samsung Electronics	Primitive Miscellanies		Original	PDF
STDH150 ASIC		Samsung Electronics	Input - Output Cells		Original	PDF
STDH150 ASIC		Samsung Electronics	Characteristics		Original	PDF

STDH150 ASIC		Samsung Electronics	I-O Cells		Original	PDF

STDH150 Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
ARM9TDMI Abstract: ARM1020E samsung hdd Samsung S ARM teaklite DSPG SMART ASIC bga ARM920t datasheet Avant Electronics USB samsung Text: V S MSUNG STDH150 ELECTRONICS STDH150 Standard Cell 0.13um System-On-Chip ASIC Dec 2001, V1.0 Features Analog cores - Ldrawn = 0.13um 1.2/2.5/3.3V Device - Up to 34.3 million gates - Power dissipation:9nW/MHz@1.2V, 2SL, ND2 3.3/5.0V - Gate Delay: 52ps @ 1.2V, 2SL, ND2	Original	PDF	STDH150 STDH150 ARM920T/ARM940T, ARM9TDMI ARM1020E samsung hdd Samsung S ARM teaklite DSPG SMART ASIC bga ARM920t datasheet Avant Electronics USB samsung
circuit diagram of inverting adder Abstract: STDH150 Text: BUSHOLDER Cell List Cell Name BUSHOLDER Function Description Bus Holder Logic Symbol Cell Data Input Load SL Y 5.6 Y Samsung ASIC 3-367 Gate Count 1.67 STDH150 ADDERS Cell List Cell Name Function Description FA Full Adder with 1X Drive FAD2 Full Adder with 2X Drive	Original	PDF	STDH150 circuit diagram of inverting adder STDH150
3.3v to 5v buffer latch Abstract: voltage buffer 12v B12 diode buffer low capacitance buffer 3.3v to 5v latch STDH150 Text: Electrical Characteristics 2 Contents DC Electrical Characteristics . 2-1 ELECTRICAL CHARACTERISTICS DC ELECTRICAL CHARACTERISTICS DC ELECTRICAL CHARACTERISTICS The following tables define the DC electrical characteristics for the standard LVCMOS I/O buffers	Original	PDF	STDH150 3.3v to 5v buffer latch voltage buffer 12v B12 diode buffer low capacitance buffer 3.3v to 5v latch STDH150
SL 100 data sheet Abstract: AO222 sl 100 transistor TRANSISTOR sl 100 transistor sl 100 data sheet AO211 AO22 STDH150 ND3B AO322D2 Text: LOGIC CELLS Cell Names & Function Descriptions Cell Name AD2 AD2D2 AD2D4 AD2D8 AD2B AD2BD2 AD2BD4 AD2BD8 AD3 AD3D2 AD3D4 AD4 AD4D2 AD4D4 AD5 AD5D2 AD5D4 ND2 ND2D2 ND2D4 ND2D8 ND2B ND2BD2 ND2BD4 ND2BD8 ND3 ND3D2 ND3D4 ND3D8 ND3B ND3BD2 ND3BD4 ND3BD8 ND4 ND4D2	Original	PDF	STDH150 SL 100 data sheet AO222 sl 100 transistor TRANSISTOR sl 100 transistor sl 100 data sheet AO211 AO22 STDH150 ND3B AO322D2
RISC-Processor s3c2410 Abstract: MR16R1624DF0-CM8 arm9 samsung s3c2440 architecture chip 3351 dvd sp0411n K9W8G08U1M sandisk micro SD Card 2GB arm9 s3c2440 K9F1G08U0A K6X8008C2B Text: A Section MEMORY Table of Contents SECTION A PAGE DRAM SDRAM 3a – 4a DDR SDRAM 5a – 6a DDR2 SDRAM 7a RDRAM 8a NETWORK DRAM 8a MOBILE SDRAM 9a GRAPHICS DDR SDRAM 10a DRAM ORDERING INFORMATION 11a –13a NAND FLASH COMPONENTS, SMART MEDIA, COMPACT FLASH	Original	PDF	BR-04-ALL-005 BR-04-ALL-004 RISC-Processor s3c2410 MR16R1624DF0-CM8 arm9 samsung s3c2440 architecture chip 3351 dvd sp0411n K9W8G08U1M sandisk micro SD Card 2GB arm9 s3c2440 K9F1G08U0A K6X8008C2B
AO331 Abstract: ha 1452 Y 335 STDH150 nr2d2 FD2S Text: Appendix Maximum Fanouts C Appendix C Maximum Fanouts of Internal Macrocells Maximum Fanouts of Internal Macrocells When input tR/tF = 0.073ns, one fanout (SL = 0.00412pF) Cell Name ad2 ad2b ad2bd2 ad2bd4 ad2bd8 ad2d2 ad2d4 ad2d8 ad3 ad3d2 ad3d4 ad4 ad4d2	Original	PDF	073ns, 00412pF) ao211 ao2111 ao2111d2 ao211d2 ao211d4 ao21d2 ao21d4 ao221 AO331 ha 1452 Y 335 STDH150 nr2d2 FD2S
ha 1452 Amplifiers Abstract: 8-669 0.13um standard cell library ARM9TDMI kt 714 vhdl coding for analog to digital converter AO211 KT 829 KT 829 b samsung LVDS 30 PIN Text: Introduction 1 Table of Contents 1.1 Library Description . 1-1 1.2 Features . 1-2	Original	PDF	STDH150 ha 1452 Amplifiers 8-669 0.13um standard cell library ARM9TDMI kt 714 vhdl coding for analog to digital converter AO211 KT 829 KT 829 b samsung LVDS 30 PIN
CL 0805 Abstract: Transistor BC 547, CL 100 STDH150 7907 4601 PMOD12 samsung 1622 Text: INPUT BUFFERS Cell List Cell Name Function Description PMIC/PMICD/PMICU 2.5V Interface CMOS Level Input Buffers PHIC/PHICD/PHICU 3.3V Interface CMOS Level Input Buffers PMTIC/PMTICD/PMTICU 5V-tolerant for 2.5V Interface CMOS Level Input Buffers PHTIC/PHTICD/PHTICU	Original	PDF	STDH150 CL 0805 Transistor BC 547, CL 100 STDH150 7907 4601 PMOD12 samsung 1622
CL1101 Abstract: CL1502 610 108 001 PHSOSCK17/M16/M26/M36 SL 100 power transistor sl 100 transistor YN 2 SL 220 CL117 CL166 PHSOSCK17 Text: INPUT CLOCK DRIVERS Cell List Cell Name Function Description PMSCKDC 2/4/6/8 2.5V CMOS Level Input Clock Driver PMSCKDCD(2/4/6/8) 2.5V CMOS Level Input Clock Driver with Pull-Down PMSCKDCU(2/4/6/8) 2.5V CMOS Level Input Clock Driver with Pull-Up PMSCKDS(2/4/6/8)	Original	PDF	STDH150 CL1101 CL1502 610 108 001 PHSOSCK17/M16/M26/M36 SL 100 power transistor sl 100 transistor YN 2 SL 220 CL117 CL166 PHSOSCK17
D 4242 Abstract: pcb design 0,5 mm pitch Samsung 3232 STDH150 FBGA PACKAGE thermal resistance Text: Appendix Package Capabilities D Package Appendix D Package The most current package availability and capability can be obtained from your local Samsung Technology and Design Centers. • In-house ❏ Sub-contractor LQFP Package 0707 mm 1010 mm 1212 mm 1420 mm	Original	PDF	STDH150 D 4242 pcb design 0,5 mm pitch Samsung 3232 STDH150 FBGA PACKAGE thermal resistance
AO222 Abstract: FD6S SCG12 OA31 ND3B AO2222 FD2D2 AO322D2 LD6QD2 oa221 Text: Internal Macrocells 3 Contents Overview . 3-1 Summary Tables. 3-2	Original	PDF	STDH150 AO222 FD6S SCG12 OA31 ND3B AO2222 FD2D2 AO322D2 LD6QD2 oa221
STDH150 Abstract: No abstract text available Text: OSCILLATORS DC Electrical Characteristic Symbol Parameter Condition Min Typ Max Unit Vih High level input voltage 0.8xVdd Vdd V Vil Low level input voltage Vss 0.2×Vdd V Iih High level input current Vin=Vdd −10 10 µA IiI Low level input current Vin=Vss	Original	PDF	STDH150 100kHz) phsosck17 STDH150
4583 dual schmitt trigger Abstract: verilog code for UART with BIST capability transistor sk 3562 VIA Apollo Design Guide of AT 89551 oa31 diode schematic diagram ac-dc inverter circuit of samsung CRT soc 1044 tl 8709 p Text: Introduction 1 Table of Contents 1.1 Library Description . 1-1 1.2 Features . 1-2	Original	PDF	STDH150 4583 dual schmitt trigger verilog code for UART with BIST capability transistor sk 3562 VIA Apollo Design Guide of AT 89551 oa31 diode schematic diagram ac-dc inverter circuit of samsung CRT soc 1044 tl 8709 p
sck 057 Abstract: SCK 084 056 SCK 164 STDH150 FD4S Text: FLIP-FLOPS Cell List Cell Name Function Description FD1 D Flip-Flop with 1X Drive FD1D2 D Flip-Flop with 2X Drive FD1D4 D Flip-Flop with 4X Drive FD1CS D Flip-Flop with Scan Clock, 1X Drive FD1CSD2 D Flip-Flop with Scan Clock, 2X Drive FD1CSD4 D Flip-Flop with Scan Clock, 4X Drive	Original	PDF	STDH150 sck 057 SCK 084 056 SCK 164 STDH150 FD4S

EV25 Abstract: STDH150 Text: Input/Output Cells 4 Contents Summary Tables .4-2	Original	PDF	STDH150 EV25 STDH150
STDH150 Abstract: No abstract text available Text: LATCHES Cell List Cell Name Function Description LD1 D Latch with Active High, 1X Drive LD1D2 D Latch with Active High, 2X Drive LD1D4 D Latch with Active High, 4X Drive LD1Q D Latch with Active High, Q Output Only, 1X Drive LD1QD2 D Latch with Active High, Q Output Only, 2X Drive	Original	PDF	STDH150 STDH150