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Abstract: PLASTIC QUAD FLAT PACK 160 PINS DIMENSION LXT304A LXT305A LXT307 LXT310 LXT317 LXT318 LXT325 A 3120 8 Pins ICs
Text: Fall 1998 Communication ICs Data Book Table 1: Telecom Product/Packages Product Table 1: Telecom Product/Packages Product Package Package SXT6051 208 QFP SXT6251 208 QFP SXT6282 144-Pin LQFP LXT300Z/301Z 28-Pin DIP and 28-Pin PLCC LXT304A 28-Pin DIP and 28-Pin PLCC
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SXT6051
SXT6251
SXT6282
144-Pin
LXT300Z/301Z
28-Pin
LXT304A
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PLASTIC QUAD FLAT PACK 160 PINS DIMENSION
LXT304A
LXT305A
LXT307
LXT310
LXT317
LXT318
LXT325
A 3120 8 Pins ICs
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E1 HDB3
Abstract: SXT6234 LEVEL ONE COMMUNICATIONS G703 G704 LXT334 t j9h mux E1 E1 frame
Text: DATA SHEET SEPTEMBER, 1998 Revision 1.1 SXT6282 Octal E1 Digital Interface with CRC-4 Monitoring and Jitter/Wander Suppression General Description Features SXT6282 is an eight-channel E1 digital interface. It integrates an E1 dejitter phase locked loop, an E1 retiming
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SXT6282
SXT6282
SXT6251
PDS-6282-R1
E1 HDB3
SXT6234
LEVEL ONE COMMUNICATIONS
G703
G704
LXT334
t j9h
mux E1
E1 frame
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LXT902
Abstract: Evaluation Board SXT6234 t1.403 National Standard for Telecommunications PAIRGAIN campus multiplexing demultiplexing e2 e3 wireless lan 10 KM circuit LXT901A LXT904 LXT905 LXT906
Text: Networking Networking Product Line Summary Applications Part Number Features 10 Mbps Ethernet Transceivers Ethernet Interface Adapter Universal
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10BASE-T
LXT901A/
LXT907A/
LXT908
SW/56
LXT400
LXT316
LXT313
LXT902
Evaluation Board SXT6234
t1.403 National Standard for Telecommunications
PAIRGAIN campus
multiplexing demultiplexing e2 e3
wireless lan 10 KM circuit
LXT901A
LXT904
LXT905
LXT906
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LXT6234
Abstract: LXT6282 E1 HDB3
Text: Data Sheet MARCH 1999 Revision 2.0 LXT6282 Octal E1 Digital Interface with CRC-4 Monitoring and Jitter/Wander Suppression General Description Features LXT6282 is an eight-channel E1 digital interface. It integrates an E1 dejitter phase locked loop, an E1 retiming
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LXT6282
LXT6282
SXT6251
PDS-6282-R1
LXT6234
E1 HDB3
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san francisco telecom
Abstract: X1HB 001H MTC21 SXT6251 MTC11 MTD16 P1396 MTC13 MTC15
Text: DATA SHEET MAY 1998 Revision 1.1 SXT6251 21 E1 SDH Mapper General Description Features The SXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard Telecom
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SXT6251
SXT6251
SXT6051
san francisco telecom
X1HB
001H
MTC21
MTC11
MTD16
P1396
MTC13
MTC15
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G-783
Abstract: SDH -209 AN107 LXT380
Text: Timing Interface Using the LXT380 Application Note January 2001 Order Number: 249129-001 As of January 15, 2001, this document replaces the Level One document known as AN107. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
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LXT380
AN107.
LXT380s
G-783
SDH -209
AN107
LXT380
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Untitled
Abstract: No abstract text available
Text: Product Overview JUNE 1998 SXT6282 Octal E1 Digital Interface with CRC-4 Monitoring and Jitter/ Wander Suppression General Description Features The SXT6282 is an independent eight-channel El digital interface. It integrates an E l dejitter phase locked loop, an
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SXT6282
SXT6282
theSXT6251
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Untitled
Abstract: No abstract text available
Text: Data Sheet LXT6282 MARCH 1999 Revision 2.0 Octal E1 Digital Interface with CRC-4 Monitoring and Jitter/Wander Suppression General Description Features LXT6282 is an eight-channel E l digital interface. It inte grates an E l dejitter phase locked loop, an E l retiming
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LXT6282
LXT6282
SXT6251
SXT6282LE.
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