F100K
Abstract: SY100S350 SY100S350FC SY100S350FCTR SY100S350JC
Text: Micrel, Inc. SY100S350 FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ SY100S350 HEX D-LATCH DESCRIPTION The SY100S350 offers six high-speed D-Latches with both true and complement outputs, and is performance compatible for use with high-performance ECL systems.
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SY100S350
SY100S350
M9999-032206
F100K
SY100S350FC
SY100S350FCTR
SY100S350JC
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Untitled
Abstract: No abstract text available
Text: SY100S350 Micrel, Inc. FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ SY100S350 HEX D-LATCH DESCRIPTION The SY100S350 offers six high-speed D-Latches with both true and complement outputs, and is performance compatible for use with high-performance ECL systems.
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Original
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PDF
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SY100S350
SY100S350
M9999-042307
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F100K
Abstract: SY100S350 SY100S350JC SY100S350JCTR
Text: SY100S350 Micrel, Inc. FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ SY100S350 HEX D-LATCH DESCRIPTION The SY100S350 offers six high-speed D-Latches with both true and complement outputs, and is performance compatible for use with high-performance ECL systems.
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Original
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PDF
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SY100S350
SY100S350
M9999-042307
F100K
SY100S350JC
SY100S350JCTR
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F100K
Abstract: SY100S350 SY100S350FC SY100S350JC SY100S350JCTR
Text: HEX D-LATCH FEATURES Q1 Q1 Q0 D0 Q0 VEES PIN CONFIGURATIONS D1 11 10 9 8 7 6 5 D2 Ea 12 13 14 15 16 17 Eb 18 D3 VEE BLOCK DIAGRAM VEES MR D1 D0 R D2 24 23 22 21 20 19 18 D1 2 3 17 16 D0 Q0 15 14 Q0 Q1 13 7 8 9 10 11 12 Q1 Q4 4 5 Q4 6 Top View Flatpack F24-1
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F24-1
J28-1
VEESF24-1
SY100S350JC
SY100S350JCTR
SY100S350
F24-1)
F100K
SY100S350
SY100S350FC
SY100S350JC
SY100S350JCTR
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hex latch
Abstract: F100K SY100S350 SY100S350FC SY100S350JC SY100S350JCTR
Text: SY100S350 FINAL HEX D-LATCH FEATURES Q1 Q1 Q0 D0 Q0 VEES PIN CONFIGURATIONS D1 11 10 9 8 7 6 5 D2 Ea 12 13 14 15 16 17 Eb 18 D3 VEE BLOCK DIAGRAM VEES MR D1 D0 R D2 24 23 22 21 20 19 18 D1 2 3 17 16 D0 Q0 15 14 Q0 Q1 13 7 8 9 10 11 12 Q1 Q4 4 5 Q4 6 Top View
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Original
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PDF
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SY100S350
F24-1
SY100S350JC
J28-1
SY100S350JCTR
F24-1)
J28-1)
hex latch
F100K
SY100S350
SY100S350FC
SY100S350JC
SY100S350JCTR
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Untitled
Abstract: No abstract text available
Text: « SYNERGY HEX D-LATCH SY100S350 SEMICONDUCTOR FEATURES • Max. transparent propagation delay of 900ps ■ Min. Master Reset and Enable pulse widths of 100ps ■ Ie e min. of -98m A ■ Industry standard 100K ECL levels ■ Extended supply voltage option:
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SY100S350
900ps
100ps
SY100S350
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Untitled
Abstract: No abstract text available
Text: * HEX D-LATCH SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION Max. transparent propagation delay of 900ps Min. Master Reset and Enable pulse widths of 100ps Ie e SY100S350 min. of -98mA ESD protection of 2000V Industry standard 100K ECL levels Extended supply voltage option:
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900ps
100ps
SY100S350
-98mA
SY100S350DC
D24-1
SY1OOS35DFC
F24-1
SY100S350JC
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DI 437 EB
Abstract: No abstract text available
Text: * HEX D-LATCH SYNERGY SY100S350 SEMICONDUCTOR FEATURES DESCRIPTION Max. transparent propagation delay of 900ps Min. Master Reset and Enable pulse widths of 100ps I e e min. o f-9 8m A Industry standard 100K ECL levels Extended supply voltage option: V ee = -4.2V to -5.5V
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OCR Scan
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PDF
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SY100S350
900ps
100ps
SY100S350
DI 437 EB
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Untitled
Abstract: No abstract text available
Text: * HEX D-LATCH SYNERGY SY100S350 SEMICONDUCTOR FEATURES DESCRIPTION Max. transparent propagation delay of 900ps Min. Master Reset and Enable pulse widths of 100ps Iee min. o f-98 m A Industry standard 100K ECL levels Extended supply voltage option: V ee = -4.2V to -5.5V
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OCR Scan
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PDF
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SY100S350
900ps
100ps
SY100S350
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