GR-1244-CORE
Abstract: GR-253-CORE ZL30109 ZL30109QDG ZL30109QDG1
Text: ZL30109 DS1/E1 System Synchronizer with 19.44 MHz Output Data Sheet Features November 2005 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for
|
Original
|
ZL30109
GR-1244-CORE
ZL30109QDG
ZL30109QDG1
GR-253-CORE
ZL30109
|
PDF
|
GR-1244-CORE
Abstract: GR-253-CORE ZL30109 ZL30109QDG ZL30109QDG1 TC65D
Text: ZL30109 DS1/E1 System Synchronizer with 19.44 MHz Output Data Sheet Features November 2004 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for
|
Original
|
ZL30109
GR-1244-CORE
ZL30109QDG
ZL30109QDG1
GR-253-CORE
ZL30109
TC65D
|
PDF
|
ZL30102
Abstract: GR-1244-CORE ZL30102QDG ZL30102QDG1
Text: ZL30102 T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 Data Sheet Features • November 2005 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between an H.110 primary master clock and a secondary master clock
|
Original
|
ZL30102
ZL30102QDG
ZL30102QDG1
GR-1244-CORE
ZL30102
|
PDF
|
GR-1244-CORE
Abstract: GR-253-CORE ZL30109 ZL30109QDG ZL30109QDG1 T110
Text: ZL30109 DS1/E1 System Synchronizer with 19.44 MHz Output Data Sheet Features April 2010 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces Ordering Information *Pb Free Matte Tin
|
Original
|
ZL30109
GR-1244-CORE
ZL30109QDG1
GR-253-CORE
ZL30109
ZL30109QDG
T110
|
PDF
|
GR-1244-CORE
Abstract: GR-253-CORE ZL30106 ZL30106QDG "network interface cards"
Text: ZL30106 SONET/SDH/PDH Network Interface DPLL Data Sheet Features • • • • • • • • October 2004 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between inputs and outputs Supports output wander and jitter generation specifications for SONET/SDH and PDH
|
Original
|
ZL30106
GR-1244-CORE
GR-253-CORE
ZL30106
ZL30106QDG
"network interface cards"
|
PDF
|
GR-1244-CORE
Abstract: ZL30102 ZL30102QDG ZL30102QDG1
Text: ZL30102 T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 Data Sheet Features April 2010 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between an H.110 primary master clock and a secondary master clock •
|
Original
|
ZL30102
GR-1244-CORE
ZL30102
ZL30102QDG
ZL30102QDG1
|
PDF
|
GR-1244-CORE
Abstract: ZL30100 ZL30100QDC ZL30100QD
Text: ZL30100 T1/E1 System Synchronizer Data Sheet Features June 2004 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbps and 1544 kbps interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces
|
Original
|
ZL30100
GR-1244-CORE
ZL30100
ZL30100QDC
ZL30100QD
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ZL30100 T1/E1 System Synchronizer Data Sheet Features February 2005 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for
|
Original
|
ZL30100
GR-1244-CORE
|
PDF
|
GR-1244-CORE
Abstract: GR1244-CORE ZL30101 ZL30101QDC ZL30101QDG1
Text: ZL30101 T1/E1 Stratum 3 System Synchronizer Data Sheet Features April 2010 • Supports Telcordia GR-1244-CORE Stratum 3 • Supports G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces Ordering Information ZL30101QDG1 64 Pin TQFP* Trays, Bake & Drypack
|
Original
|
ZL30101
GR-1244-CORE
ZL30101QDG1
GR1244-CORE
ZL30101
ZL30101QDC
|
PDF
|
GR-1244-CORE
Abstract: GR-253-CORE MT90866 ZL30105 ZL30105QDG ZL30106 tc84l
Text: ZL30105 T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110 Data Sheet Features June 2004 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between the master-clock and the redundant slave-clock • Supports ITU-T G.813 option 1, G.823 for 2048 kbs
|
Original
|
ZL30105
GR-1244-CORE
ZL30105QDG
GR-253-CORE
MT90866
ZL30105
ZL30105QDG
ZL30106
tc84l
|
PDF
|
GR-1244-CORE
Abstract: ZL30102 ZL30102QDG
Text: ZL30102 T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 Data Sheet Features July 2004 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between an H.110 primary master clock and a secondary master clock •
|
Original
|
ZL30102
GR-1244-CORE
ZL30102
ZL30102QDG
|
PDF
|
GR-1244-CORE
Abstract: ZL30100 ZL30100QDC ZL30100QDG1
Text: ZL30100 T1/E1 System Synchronizer Data Sheet Features February 2006 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for
|
Original
|
ZL30100
GR-1244-CORE
ZL30100
ZL30100QDC
ZL30100QDG1
|
PDF
|
ICS8400110I
Abstract: in 4007 diode footprint VFQFN C250 C650 ICS00110EIL MO-220 tC65L 8400110EKILF c65d
Text: Low Jitter, Telecom Rate-Conversion PLL ICS8400110I DATA SHEET General Description The ICS8400110I generates a 65.536MHz clock that is either locked to the input reference or locked to the external crystal or oscillator. In the locked mode, the reference input is continuously monitored for
|
Original
|
ICS8400110I
ICS8400110I
536MHz
25MHz
in 4007 diode footprint
VFQFN
C250
C650
ICS00110EIL
MO-220
tC65L
8400110EKILF
c65d
|
PDF
|
GR-1244-CORE
Abstract: GR-253-CORE ZL30106 ZL30106QDG ZL30106QDG1 "network interface cards"
Text: ZL30106 SONET/SDH/PDH Network Interface DPLL Data Sheet Features • • • • • • • November 2005 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between inputs and outputs Supports output wander and jitter generation specifications for SONET/SDH and PDH
|
Original
|
ZL30106
GR-1244-CORE
GR-253-CORE
ZL30106
ZL30106QDG
ZL30106QDG1
"network interface cards"
|
PDF
|
|
|
tc32l
Abstract: No abstract text available
Text: ZL30100 T1/E1 System Synchronizer Data Sheet Features March 2004 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbps and 1544 kbps interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces
|
Original
|
ZL30100
GR-1244-CORE
tc32l
|
PDF
|
"network interface cards"
Abstract: No abstract text available
Text: ZL30106 SONET/SDH/PDH Network Interface DPLL Data Sheet Features • • • • • • • • July 2005 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between inputs and outputs Supports output wander and jitter generation specifications for SONET/SDH and PDH
|
Original
|
ZL30106
ZL30106QDG
"network interface cards"
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ZL30100 T1/E1 System Synchronizer Data Sheet Features July 2005 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces
|
Original
|
ZL30100
GR-1244-CORE
|
PDF
|
HM 338
Abstract: No abstract text available
Text: ZL30105 T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110 Data Sheet Features June 2004 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between the master-clock and the redundant slave-clock • Supports ITU-T G.813 option 1, G.823 for 2048 kbs
|
Original
|
ZL30105
GR-1244-CORE
HM 338
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ZL30109 DS1/E1 System Synchronizer with 19.44 MHz Output Data Sheet Features May 2005 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for
|
Original
|
ZL30109
GR-1244-CORE
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ZL30106 SONET/SDH/PDH Network Interface DPLL Data Sheet Features • • • • • • • • June 2004 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between inputs and outputs Supports output wander and jitter generation specifications for SONET/SDH and PDH
|
Original
|
ZL30106
|
PDF
|
GR-1244-CORE
Abstract: ZL30100 ZL30100QDC ZL30100QDG1
Text: ZL30100 T1/E1 System Synchronizer Data Sheet Features April 2010 • Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E • Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces
|
Original
|
ZL30100
GR-1244-CORE
65ers.
ZL30100
ZL30100QDC
ZL30100QDG1
|
PDF
|
ZL30101QDC
Abstract: GR-1244-CORE GR1244-CORE ZL30101
Text: ZL30101 T1/E1 Stratum 3 System Synchronizer Data Sheet Features October 2004 • Supports Telcordia GR-1244-CORE Stratum 3 • Supports G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces • Ordering Information ZL30101QDC Supports ANSI T1.403 and ETSI ETS 300 011 for
|
Original
|
ZL30101
GR-1244-CORE
ZL30101QDC
10clude
ZL30101QDC
GR1244-CORE
ZL30101
|
PDF
|
Untitled
Abstract: No abstract text available
Text: ZL30102 T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110 Data Sheet Features June 2004 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between an H.110 primary master clock and a secondary master clock •
|
Original
|
ZL30102
GR-1244-CORE
|
PDF
|
ZL30110LDE1
Abstract: C25co tC100L
Text: ZL30110 Telecom Rate Conversion DPLL Data Sheet Features April 2008 • Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 16.384 MHz • Provides a range of output clocks: • Ordering Information ZL30110LDE ZL30110LDE1 32 Pin QFN 32 Pin QFN* Tubes Bake & Dry Pack
|
Original
|
ZL30110
ZL30110LDE
ZL30110LDE1
C25co
tC100L
|
PDF
|