PD45128163
Abstract: uPD45128163G5-A75-9JF-E
Text: DATA SHEET MOS INTEGRATED CIRCUIT PD45128163-E 128M-bit Synchronous DRAM 4-bank, LVTTL Description EO The μPD45128163 is high-speed 134,217,728-bit synchronous dynamic random-access memory, organized as 2,097,152 x 16 × 4 word × bit × bank . The synchronous DRAM achieved high-speed data transfer using the pipeline architecture.
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PD45128163-E
128M-bit
PD45128163
728-bit
54-pin
uPD45128163G5-A75-9JF-E
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PD45128441
Abstract: PD45128441G5-A10-9JF PD45128441G5-A75-9JF uPD45128441G5-A75A-9JF PD45128441G5-A80-9JF PD45128841G5-A10-9JF PD45128841G5-A75-9JF uPD45128841G5-A75A-9JF PD45128841G5-A80-9JF
Text: DATA SHEET MOS INTEGRATED CIRCUIT PD45128441, 45128841 128M-bit Synchronous DRAM 4-bank, LVTTL Description EO The μPD45128441, 45128841 are high-speed 134,217,728-bit synchronous dynamic random-access memories, organized as 8,388,608 x 4 × 4, 4,194,304 × 8 × 4 word × bit × bank , respectively.
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Original
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PDF
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PD45128441,
128M-bit
728-bit
54-pin
PD45128441
PD45128441G5-A10-9JF
PD45128441G5-A75-9JF
uPD45128441G5-A75A-9JF
PD45128441G5-A80-9JF
PD45128841G5-A10-9JF
PD45128841G5-A75-9JF
uPD45128841G5-A75A-9JF
PD45128841G5-A80-9JF
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PD45128163
Abstract: PD45128163G5-A10-9JF PD45128163G5-A75-9JF uPD45128163G5-A75A-9JF uPD45128163G5-A75L-9JF PD45128163G5-A80-9JF uPD45128163G5-A80L-9JF
Text: DATA SHEET MOS INTEGRATED CIRCUIT PD45128163 128M-bit Synchronous DRAM 4-bank, LVTTL Description EO The μPD45128163 is high-speed 134,217,728-bit synchronous dynamic random-access memory, organized as 2,097,152 x 16 × 4 word × bit × bank . The synchronous DRAM achieved high-speed data transfer using the pipeline architecture.
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Original
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PDF
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PD45128163
128M-bit
PD45128163
728-bit
54-pin
PD45128163G5-A10-9JF
PD45128163G5-A75-9JF
uPD45128163G5-A75A-9JF
uPD45128163G5-A75L-9JF
PD45128163G5-A80-9JF
uPD45128163G5-A80L-9JF
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PD45128441
Abstract: uPD45128441G5-A10I-9JF uPD45128441G5-A75I-9JF uPD45128441G5-A80I-9JF PD45128441-I uPD45128841G5-A10I-9JF uPD45128841G5-A75I-9JF uPD45128841G5-A80I-9JF
Text: DATA SHEET MOS INTEGRATED CIRCUIT PD45128441-I, 45128841-I 128M-bit Synchronous DRAM 4-bank, LVTTL WTR Wide Temperature Range Description EO The μPD45128441, 45128841 are high-speed 134,217,728-bit synchronous dynamic random-access memories, organized as 8,388,608 x 4 × 4, 4,194,304 × 8 × 4 (word × bit × bank), respectively.
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Original
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PDF
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PD45128441-I,
45128841-I
128M-bit
PD45128441,
728-bit
54-pin
PD45128441
uPD45128441G5-A10I-9JF
uPD45128441G5-A75I-9JF
uPD45128441G5-A80I-9JF
PD45128441-I
uPD45128841G5-A10I-9JF
uPD45128841G5-A75I-9JF
uPD45128841G5-A80I-9JF
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PD45128163
Abstract: uPD45128163G5-A10LT-9JF uPD45128163G5-A10T-9JF uPD45128163G5-A75LT-9JF uPD45128163G5-A75T-9JF uPD45128163G5-A80LT-9JF uPD45128163G5-A80T-9JF PD45128163-T
Text: DATA SHEET MOS INTEGRATED CIRCUIT PD45128163-T 128M-bit Synchronous DRAM 4-bank, LVTTL WTR Wide Temperature Range Description EO The μPD45128163 is high-speed 134,217,728-bit synchronous dynamic random-access memory, organized as 2,097,152 x 16 × 4 (word × bit × bank).
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Original
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PDF
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PD45128163-T
128M-bit
PD45128163
728-bit
54-pin
uPD45128163G5-A10LT-9JF
uPD45128163G5-A10T-9JF
uPD45128163G5-A75LT-9JF
uPD45128163G5-A75T-9JF
uPD45128163G5-A80LT-9JF
uPD45128163G5-A80T-9JF
PD45128163-T
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uPD45128441G5-A75T-9JF
Abstract: uPD45128441G5-A80T-9JF PD45128441-T PD45128441 uPD45128441G5-A10T-9JF uPD45128841G5-A10T-9JF uPD45128841G5-A75T-9JF uPD45128841G5-A80T-9JF
Text: DATA SHEET MOS INTEGRATED CIRCUIT PD45128441-T, 45128841-T 128M-bit Synchronous DRAM 4-bank, LVTTL WTR Wide Temperature Range Description EO The μPD45128441, 45128841 are high-speed 134,217,728-bit synchronous dynamic random-access memories, organized as 8,388,608 x 4 × 4, 4,194,304 × 8 × 4 (word × bit × bank), respectively.
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Original
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PDF
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PD45128441-T,
45128841-T
128M-bit
PD45128441,
728-bit
54-pin
uPD45128441G5-A75T-9JF
uPD45128441G5-A80T-9JF
PD45128441-T
PD45128441
uPD45128441G5-A10T-9JF
uPD45128841G5-A10T-9JF
uPD45128841G5-A75T-9JF
uPD45128841G5-A80T-9JF
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Untitled
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT P D 4 5 1 2 8 4 4 1 - A 7 5 ,4 5 1 2 8 8 4 1 -A 7 5 , 4 5 1 2 8 1 6 3 -A 7 5 128M-bit Synchronous DRAM, 133MHz 4-bank, LVTTL Description The ,uPD45128441-A75, 45128841-A75 and 45128163-A75 are high-speed 134,217,728-bit synchronous dynamic
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OCR Scan
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PDF
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128M-bit
133MHz
uPD45128441-A75
45128841-A75
45128163-A75
728-bit
54-pin
M14378EJ1V0DS00
uPD45128xxx
uPD45128xxxG5
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT /¿PD45128441, 45128841, 45128163 128M-bit Synchronous DRAM 4-bank, LVTTL Description The ,uPD45128441, 45128841, 45128163 are high-speed 134,217,728-bit synchronous dynamic random-access memories, organized as 8,388,608 x 4 x 4, 4,194,304 x 8 x 4, 2,097,152 x 16 x 4 word x bit x bank , respectively.
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OCR Scan
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PDF
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uPD45128441
uPD45128841
uPD45128163
128M-bit
728-bit
54-pin
12650EJ9V0D
PD45128441,
uPD45128xxx
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT /¿ P D 4 5 1 2 8 4 4 1 - A 7 5 , 4 5 1 2 8 8 4 1 - A 7 5 128M-bit Synchronous DRAM, 133MHz 4-bank, LVTTL Description The ^¡PD45128441-A75, 45128841-A75 are high-speed 134,217,728-bit synchronous dynam ic random-access
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OCR Scan
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PDF
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128M-bit
133MHz
PD45128441-A75,
45128841-A75
728-bit
54-pin
14030EJ1V
0DS00
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET NEC MOS INTEGRATED CIRCUIT //PD45128441,45128841,45128163 128M-bit Synchronous DRAM 4-bank, LVTTL Description The ,uPD45128441, 45128841, 45128163 are high-speed 134,217,728-bit synchronous dynamic random-access memories, organized as 8,388,608 x 4 x 4, 4,194,304 x 8 x 4, 2,097,152 x 16 x 4 word x bit x bank , respectively.
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OCR Scan
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PDF
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//PD45128441
128M-bit
uPD45128441
728-bit
54-pin
12650EJ80D
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